Current-type fuzzy processor

A fuzzy processor for operating with a plurality of standard patterns each having a plurality of features, said fuzzy processor comprising:

• a characteristic decoder for receiving a to-be-identified pattern having a plurality of input features, and generating a plurality of characteristic values corresponding to said plurality of input features respectively;
• a plurality of membership function generators respectively corresponding to each one of said plurality of features of each one of said plurality of features of each one of said plurality of characteristic values to generate a plurality of characteristic values to generate a plurality of membership degrees respectively for each one of said plurality of input features corresponding to each one of said plurality of standard patterns;
• a weighting decoder for receiving a weighting code and generating a weighting value;
• a plurality of weighting adjustment circuits for receiving the membership degrees from different membership function generators and performing weighting operations on said received membership degrees according to said weighting value to generate weighted membership degrees;
• a plurality of accumulators, each receiving the weighted membership degrees from one of said plurality of weighting adjustment circuits for performing accumulation operations to generate a synthesis membership degree;
• a winner-take-all circuit for receiving the synthesis membership degrees from said plurality of accumulators and outputting said synthesis membership degrees in an order of magnitude;
• and
• a timing and control logic for generating timing and control signals for said fuzzy processor, wherein each one of said plurality of membership function generators comprises a plurality of current mirrors and a plurality of switch transistors for generating a current representing one of said plurality of membership degrees.