System and method for bit loading with optimal margin assignment

Abstract

A system and method which establishes an optimum margin for each channel in a discrete multi-tone (DMT) transceiver. The present system entails a discrete multi-tone transceiver which comprises a processor and a memory. Stored on the memory is operating logic which directs the function of the processor. The operating logic includes bit allocation logic and signal-to-noise (SNR) variation logic. The SNR variation logic determines an variation in the signal-to-noise ratio for each channel. The bit loading logic then determines a bit loading configuration based upon the variation in the signal-to-noise ratio ascertained by the SNR variation logic. The SNR variation logic preferably includes logic to determine the variation in the signal-to-noise ratio by means of statistical analysis, however, other approaches to determining the variation in the signal-to-noise ratio may be employed.

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