Clock input control circuit
AssigneeNEC Corporation
InventorHiroyuki Igura
Life of this patent
Estimating the term…
Abstract
In response to the inputting of an asynchronous signal (DATA) which is not synchronized with a clock signal, the inputting of the clock signal to the inside of the device is controlled to an on-state. Further, in response to the termination of the operation of the device, the inputting of the clock signal to the inside of the device is controlled to an off-state. In this case, the level change of the asynchronous signal is detected by a comparator, and based on the detection result, the inputting of the clock signal is controlled to either the on-state or the off-state by a clock control circuit. By stopping the inputting of the clock signal, the power consumption of the device can be reduced.
Claims13
A clock input control circuit for controlling on/off of the inputting of a clock signal for synchronizing the operation within a device, said clock input control means including an input control means which controls the inputting of said clock signal to the inside of said device to an on-state in response to the inputting of an asynchronous signal which is not synchronized with said clock signal.
Dependencies are inferred from the claim text.