US 6,205,155 B1 · Apparatus and method for limiting data bursts in ATM switch utilizing shared bus

Abstract

An ATM switch system has a plurality of input ports and output ports all having associated buffers, and a source traffic control system which includes a shared bus coupling the ports, and a switch controller or arbiter which controls the transfer of data among the ports via the shared bus. ATM cells placed on the shared bus include an internal destination address which designates the output port within the switch to which the ATM cell is destined. The switch controller monitors the internal destination addresses of the ATM cells, and increments a counter associated with the destination port when the destination corresponds, and decrements other counters which do not correspond to the destination. Accordingly, bursts for a particular output port causes the count of the associated counter to grow large; whereas frequent or long breaks cause the count to drop. The counts are compared to a high threshold which alerts the arbiter that the buffer of the output port being tracked is in danger of overflowing. Upon receiving the alert, the arbiter either stalls the bus by refusing to grant access to the bus until the counter decrements below the first threshold, or grants bus access to the input port associated with the output port on the theory that the input port will not be sending data to its own output. A low threshold is utilized to declare that a burst is over and to free the counter for tracking a new burst to the same or a different output port.

Claims17

Dependent claims

An ATM switch system, comprising:

a) a plurality of input ports each having input buffer memory;
b) a plurality of output ports each having associated buffer memory;
and
c) a source traffic control system including a shared bus which couples said input ports and said output ports, and a switch controller which controls transfer of data among said input ports and said output ports via said shared bus according to a frame,
said frame including a field for an internal destination output port address, a request field for allowing input ports to request write access to said shared bus, and a grant field for allowing said switch controller to designate which of said plurality of input ports is to receive write access to said shared bus,
said switch controller including means for monitoring said internal destination output port address field, and a plurality of counters at least temporarily associated with certain of said output ports, means for incrementing a count of one of said counters when a value in said internal destination output port address field corresponds to the one of said output ports associated with that counter, and for decrementing said count of one of said counters when said value in said internal destination output port address field corresponds to one of said output ports not associated with that counter, means for comparing counts of said counters with a first threshold value and generating a signal in response thereto, and arbiter means for receiving said signal and for generating a grant based at least partially thereon.

3 more elements

In an ATM switch which includes a plurality of input ports with associated input buffers, a plurality output ports with associated buffers, a source traffic control system having a shared bus which couples the input ports to the output ports, and a switch controller which controls transfer of data among the input ports and the output ports via said shared bus according to a frame, the switch controller having a plurality of counters and an arbiter, a method for limiting ATM data bursts to one of said output ports, the method comprising:

a) during a first frame, causing each input port to place on the shared bus an internal destination output port address as overhead field of an ATM cell, upon sending an ATM cell to the one of said output ports;
b) monitoring said internal destination output port address with the switch controller;
c) during said first frame, incrementing a counter associated with the one of said output ports when the one of said output ports is addressed by said internal destination output port address, and decrementing any counter not associated with the output port addressed by said internal destination output port address;
and
d) comparing the count of said counter to a first threshold, and generating a signal when said counter reaches the first threshold;
and
e) arbitrating which, if any, of the input ports will be allowed to place an ATM cell onto the shared bus during a next frame, wherein said signal is used in said arbitrating.

4 more elements

Dependencies are inferred from the claim text.

Apparatus and method for limiting data bursts in ATM switch utilizing shared bus

Life of this patent

Apparatus and method for limiting data bursts in ATM switch utilizing shared bus

Life of this patent

Abstract

Claims17