High-speed sense amplifier of a semi-conductor memory device

In a high-speed sense amplifier where a high-speed operation is possible both in the high voltage state that a power supply voltage is higher than a reference voltage and in the low voltage state that the power supply voltage is lower than the reference voltage by connecting a current mirror-type differential amplifier and an NMOS cross couple-type differential amplifier in parallel, the high-speed sense amplifier of a semi-conductor memory device comprising:

• a first amplifying part for sensing and amplifying an inputting bit signal;
• an equalization means for equalizing an output signal of the first amplifying part when a first sense amplifier enable signal is low;
• a second amplifying part having a high voltage sense amplifying part for sensing and amplifying the first amplifying signal in a high speed in a high voltage state, a low voltage sense amplifying part connected with the high voltage sense amplifying part in parallel for sensing and amplifying the first amplifying signal in a high speed in a low voltage state;
• an output part composed of a first output means for outputting an output signal of the high voltage sense amplifying part when it is a high voltage state, a second output means for outputting an output signal of the low voltage sense amplifying part when it is a low voltage state;
• a voltage generating part for generating a power supply voltage state signal;
• a low voltage output control part for controlling an output of the low voltage sense amplifying part by using a signal being outputted in the voltage generating part and a first sense amplifier enable signal.