Variable resistor circuit and a digital-to-analog converter

A 1-bit D/A converter with a zero detect soft mute function wherein a multibit digital signal is converted into a 1-bit signal, the 1-bit signal is analog outputted through an inverting amplifier type analog low-pass filter, a counter is operated by detecting that the multibit digital signal is all zero for a constant period of time, and a feedback resistor of the inverting amplifier in the analog low-pass filter is decreased stepwise based on a discrete value of the counter so as to be finally short-circuited so that a D/A convert output is fixed at a reference potential, said feedback resistor comprising:

• a first digital control variable resistor in which a combined resistance changes stepwise, said first digital control variable resistor having i resistors (i is a positive integral number which is two or greater) connected in series and a group of first digital control switches each provided between one end of the obtained combined resistor and one end of one resistor, said group of first digital control switches being on/off controlled selectively in accordance with an output signal other than an output signal corresponding to an LSB of the counter;
• a second digital control variable resistor connected to the first digital control variable resistor in series, said second digital control variable resistor having two resistors connected in parallel and a second digital control switch connected to one side resistor in series, said second digital control switch being on/off controlled by the output signal corresponding to the LSB of the counter;
• and
• a third digital control switch provided between both ends of the first and second digital control variable resistors connected in series, said third digital control switch being ON controlled when the counter becomes a specific value so as to short-circuit both ends of the first and second digital control variable resistors.

A variable resistor circuit of digital control comprising:

• a first digital control variable resistor in which a combined resistance changes stepwise, said first digital control variable resistor having i resistors (i is a positive integral number which is two or greater) connected in series and a group of first digital control switches each provided between one end of the obtained combined resistor and one end of one resistor, said group of first digital control switches being on/off controlled selectively in accordance with output signals corresponding to bits of a counter, other than an LSB and a second LSB;
• a second digital control variable resistor connected to the first digital control variable resistor in series, said second digital control variable resistor having four resistors connected in parallel and a group of second digital control switches in which each switch is connected to three resistors among the four resistors in series, respectively, said group of second digital control switches being on/off controlled by the output signal corresponding to bits the LSB and the second LSB of the counter;
• and
• a third digital control switch provided between both ends of the first and second digital control variable resistors connected in series, said third digital control switch being ON controlled when the counter becomes a specific value so as to short-circuit both ends of the first and second digital control variable resistors.

A 1-bit D/A converter with a zero detect soft mute function wherein a multibit digital signal is converted into a 1-bit signal, the 1-bit signal is analog outputted through an inverting amplifier type analog low-pass filter, a counter is operated by detecting that the multibit digital signal is all zero for a constant period of time, and a feedback resistor of the inverting amplifier in the analog low-pass filter is decreased stepwise based on a discrete value of the counter so as to be finally short-circuited so that a D/A convert output is fixed at a reference potential, said feedback resistor comprising:

• a first digital control variable resistor in which a combined resistance changes stepwise, said first digital control variable resistor having i resistors (i is a positive integral number which is two or greater) connected in series and a group of first digital control switches each provided between one end of the obtained combined resistor and one end of one resistor, said group of first digital control switches being on/off controlled selectively in accordance with output signals corresponding to bits of the counter, other than an LSB and a second LSB;
• a second digital control variable resistor connected to the first digital control variable resistor in series, said second digital control variable resistor having four resistors connected in parallel and a group of second digital control switches in which each switch is connected to three resistors among the four resistors in series, respectively, said group of second digital control switches being on/off controlled by the output signal corresponding to bits the LSB and the second LSB of the counter;
• and
• a third digital control switch provided between both ends of the first and second digital control variable resistors connected in series, said third digital control switch being ON controlled when the counter becomes a specific value so as to short-circuit both ends of the first and second digital control variable resistors.

A variable resistor circuit of digital control comprising:

• a first digital control variable resistor in which a combined resistance changes stepwise, said first digital control variable resistor having i resistors (i is a positive integral number which is two or greater) connected in series and a group of first digital control switches each provided between one end of the obtained combined resistor and one end of one resistor, said group of first digital control switches being on/off controlled selectively in accordance with output signals of an upper bit side of a counter;
• a second digital control variable resistor connected to the first digital control variable resistor in series, said second digital control variable resistor having p resistors (p is a positive integral number which is two or greater) connected in parallel and a group of second digital control switches connected to (p−1) resistors among the p resistors in series, respectively, said group of second digital control switches being on/off controlled by output signals of a lower bit side of the counter;
• and
• a third digital control switch provided between both ends of the first and second digital control variable resistors connected in series, said third digital control switch being ON controlled when the counter becomes a specific value so as to short-circuit both ends of the first and second digital control variable resistors.

A 1-bit D/A converter with a zero detect soft mute function wherein a multibit digital signal is converted into a 1-bit signal, the 1-bit signal is analog outputted through an inverting amplifier type analog low-pass filter, a counter is operated by detecting that the multibit digital signal is all zero for a constant period of time, and a feedback resistor of the inverting amplifier in the analog low-pass filter is decreased stepwise based on a discrete value of the counter so as to be finally short-circuited so that a D/A convert output is fixed at a reference potential, said feedback resistor comprising:

• a first digital control variable resistor in which a combined resistance changes stepwise, said first digital control variable resistor having i resistors (i is a positive integral number which is two or greater) connected in series and a group of first digital control switches each provided between one end of the obtained combined resistor and one end of one resistor, said group of first digital control switches being on/off controlled selectively in accordance with output signals of an upper bit side of the counter;
• a second digital control variable resistor connected to the first digital control variable resistor in series, said second digital control variable resistor having p resistors (p is a positive integral number which is two or greater) connected in parallel and a group of second digital control switches connected to (p−1) resistors among the p resistors in series, respectively, said group of second digital control switches being on/off controlled by output signals of a lower bit side of the counter;
• and
• a third digital control switch provided between both ends of the first and second digital control variable resistors connected in series, said third digital control switch being ON controlled when the counter becomes a specific value so as to short-circuit both ends of the first and second digital control variable resistors.

A 1-bit D/A converter with a zero detect soft mute function comprising:

• a sigma-delta modulator to which a multibit digital signal is inputted and which converts the multibit digital signal into an m level signal and outputs the m level signal;
• an m level DAC to which the m level signal outputted from the sigma-delta modulator is inputted,
• an analog low-pass filter to which an analog output outputted from the m level DAC is inputted so as to output an analog signal, said analog low-pass filter having an inverting amplifier;
• a zero detect circuit detecting that the multibit digital signal is all zero for a constant period of time;
• an n-bit up/down counter starting an up-count operation when it is detected that the multibit digital signal is all zero for a constant period of time by the zero detect circuit and starting a down-count operation at the time of non-detecting;
• a decoder to which an n-bit discrete value outputted from the up/down counter is inputted and which decodes the n-bit discrete value so as to generate a substantially 2n−1 decode signal;
• and
• a feedback resistor being controlled by the substantially 2n−1 decode signal outputted from the decoder so that its resistance is decreased stepwise to be short-circuited finally, said feedback resistor comprising:
• a first digital control variable resistor in which a combined resistance changes stepwise, said first digital control variable resistor having i resistors (i is a positive integral number which is two or greater) connected in series and a group of first digital control switches each provided between one end of the obtained combined resistor and one end of one resistor, said group of first digital control switches being on/off controlled selectively in accordance with output signals of an upper bit side of a counter;
• a second digital control variable resistor connected to the first digital control variable resistor in series, said second digital control variable resistor having p resistors (p is a positive integral number which is two or greater) connected in parallel and a group of second digital control switches connected to (p−1) resistors among the p resistors in series, respectively, said group of second digital control switches being on/off controlled by output signals of a lower bit side of the counter;
• and a third digital control switch provided between both ends of the first and second digital control variable resistors connected in series, said third digital control switch being ON controlled when the counter becomes a specific value so as to short-circuit both ends of the first and second digital control variable resistors.