Digital to analog convertor having a DC offset cancelling device and a method thereof

An digital to analog converter, having a device for canceling DC offset resulting from digital to analog conversion, the device comprising:

• an adder, coupled to the digital to analog converter, for adding a digital input signal to a compensation signal;
• an analog comparator, coupled to the digital to analog converter, for sampling the analog output signal provided by the digital to analog converter, and for comparing the sampled analog output signal to a first threshold;
• a DAC emulators for receiving the digital input signal, for compensating for a time lapse between the appearance of the digital input signal at the input of the adder and the appearance of the analog output signal resulting from the digital input signal and the compensation signal;
• a digital comparator, coupled to the DAC emulator for comparing the signal provided by the DAC emulator to a second threshold;
• an offset calculation unit, coupled to the analog comparator and to the digital comparator, for generating the compensation signal and sending the compensation signal to the adder, wherein the compensation signal reflects the comparisons performed by the digital and analog comparator.

A method for canceling DC offsets resulting from converting a digital signal to an analog signal, the method comprising of:

• receiving a digital input signal;
• performing in parallel two set of steps, wherein the first set of step comprising of:
• adding the digital input signal to a compensation signal;
• converting the sum of the digital input signal and the compensation signal to an analog output signal;
• sampling an analog output signal, and comparing the sampled analog output signal to a first threshold;
• wherein the second set of steps comprising of:
• generating a delayed digital input signal by compensating for a time lapse between the appearance of the digital input signal and the appearance of the analog output signal, wherein the analog output signal resulting from the conversion of the sum of the digital input signal and the compensation signal;
• comparing between the delayed digital input signal and a second threshold:
• wherein both sets of steps are followed by generating the compensation signal, the compensation signal reflecting the comparisons between the sampled signal to the first threshold and between the delayed digital input to the second threshold.