RMS-to-DC converter with balanced multi-tanh triplet squaring cells

An RMS-to-DC converter comprising:

• a first squaring cell for generating a first current responsive to a first input signal;
• a second squaring cell for generating a second current responsive to a second input signal;
• and
• a nulling circuit coupled to the first and second squaring cells for generating an output signal responsive to the first and second currents;
• wherein:
• the first squaring cell has a first output terminal and a second output terminal for providing the first current as a first differential current;
• the second squaring cell has a first output terminal and a second output terminal for providing the second current as a second differential current;
• and
• the output terminals of the first and second squaring cells are coupled together so as to generate a third differential current responsive to the difference of the first and second differential currents.

An RMS-to-DC converter comprising:

• a first squaring cell for generating a first current responsive to a first input signal;
• a second squaring cell for generating a second current responsive to a second input signal;
• and
• a nulling circuit coupled to the first and second squaring cells for generating an output signal responsive to the first and second currents;
• wherein the first and second squaring cells are coupled together to balance the cells.

An RMS-to-DC converter comprising:

• a first squaring cell for generating a first current responsive to a first input signal;
• a second squaring cell for generating a second current responsive to a second input signal;
• and
• a nulling circuit coupled to the first and second squaring cells for generating an output signal responsive to the first and second currents;
• wherein the first and second squaring cells each include a three-transistor, series-connected, multi-tanh cell.

An RMS-to-DC converter comprising:

• a first squaring cell for generating a first current responsive to a first input signal;
• a second squaring cell for generating a second current responsive to a second input signal;
• and
• a nulling circuit coupled to the first and second squaring cells for generating an output signal responsive to the first and second currents;
• further including a set-point interface circuit coupled to the second squaring cell for providing a set-point current thereto as the second input signal responsive to a set-point signal or a feedback signal.

A method for performing an RMS-to-DC conversion comprising:

• squaring a first input signal with a first squaring cell, thereby generating a first current;
• squaring a second input signal with a second squaring cell, thereby generating a second current;
• and
• integrating the difference of the first and second currents, thereby generating an output signal;
• further including using the output signal as the second input signal to the second squaring cell, thereby nulling the first and second currents.

A method for performing an RMS-to-DC conversion comprising:

• squaring a first input signal with a first squaring cell, thereby generating a first current;
• squaring a second input signal with a second squaring cell, thereby generating a second current;
• integrating the difference of the first and second currents, thereby generating an output signal;
• and
• balancing the first and second squaring cells.

A method for performing an RMS-to-DC conversion comprising:

• squaring a first input signal with a first squaring cell, thereby generating a first current;
• squaring a second input signal with a second squaring cell, thereby generating a second current;
• and
• integrating the difference of the first and second currents, thereby generating an output signal;
• wherein the first and second squaring cells each include a three-transistor, series-connected, multi-tanh cell having an input port and a common emitter node.

An RMS-to-DC converter comprising:

• a first squaring cell for generating a first squared signal responsive to a first input signal;
• a second squaring cell for generating a second squared signal responsive to a second input signal;
• and
• a nulling circuit coupled to the first and second squaring cells for generating an output signal responsive to the first and second squared signals;
• wherein the first and second squaring cells are coupled together to balance the cells.

A method for performing an RMS-to-DC conversion comprising:

• squaring a first input signal with a first squaring cell, thereby generating a first squared signal;
• squaring a second input signal with a second squaring cell, thereby generating a second squared signal;
• integrating the difference of the first and second squared signals, thereby generating an output signal;
• and
• balancing the first and second squaring cells.

A method for providing base current compensation to a transistor cell having an input terminal for receiving base current and a common connection node for receiving a bias current, the method comprising:

• replicating the base current of the transistor cell in a replication transistor;
• generating a compensation current responsive to the base current in the replication transistor;
• and
• applying the compensation current to the input terminal of the transistor cell.

A circuit for providing base current compensation to a transistor cell having an input terminal for receiving base current and a common connection node for receiving a bias current, the circuit comprising:

• a replication transistor having a base, an emitter and a collector;
• a bias current source coupled to the replication transistor to provide a second bias current thereto;
• and
• a current mirror coupled between the base of the replication transistor and the input terminal of the transistor cell to provide a compensation current to the input terminal of the transistor cell responsive to the base current of the replication transistor.