Dual-function method and circuit for programmable device
AssigneeCypress Semiconductor Corporation
InventorChristopher W. Jones
Life of this patent
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Abstract
A logic block in a product-term based programmable device comprising a first logic gate, a second logic gate, a macrocell and a multiplexer. The first logic gate may be configured to generate a first output in response to a logical combination of a first number of product terms. The second logic gate may be configured to generate a second output in response to a logical combination of a second number of product terms. The macrocell may be configured to generate a third output in response to the second output. The multiplexer may be configured to select an output of the device in response to (i) the first output or (ii) the third output. The first number of product terms may be a subset of the second number of product terms.
Claims11
A logic block in a product-term based programmable device comprising:
- a first logic gate configured to generate a first output in response to a logical combination of a first number of product terms;
- a second logic gate configured to generate a second output in response to a logical combination of a second number of product terms;
- a macrocell configured to generate a third output in response to said second output;
- and
- a multiplexer configured to generate a fourth output in response to (i) said first output or (ii) said third output, wherein said first number of product terms is a subset of said second number of product terms.
A logic block in a product-term based programmable device comprising:
- means for generating a first output in response to a logical combination of a first number of product terms;
- means for generating a second output in response to a logical combination of a second number of product terms;
- and
- means for selecting an output of the device in response to (i) said first output or (ii) said second output, wherein said first number of product terms is a subset of said second number of product terms.
A method of providing a dual-function path in a logic block of a programmable device, said method comprising the steps of:
- (A) logically combining a first set of product terms;
- (B) logically combining a second set of product terms to provide an output;
- (C) coupling the output of the second logical combination to a macrocell;
- (D) routing the output of said macrocell to an interconnect structure of said programmable device;
- and
- (E) selecting one of the first logical combination or the output of said macrocell as an output for said programmable device, wherein said first set of product terms is a subset of said second set of product terms.
Dependencies are inferred from the claim text.