US 6,204,678 B1 · Direct connect interconnect for testing semiconductor dice and wafers

Abstract

An interconnect and system for testing semiconductor dice, and a test method using the interconnect are provided. The interconnect includes a substrate having patterns of contact members for electrically contacting the dice. The interconnect also includes patterns of conductors for providing electrical paths to the contact members. In addition, the interconnect includes contact receiving cavities configured to retain electrical connectors of a testing apparatus in electrical communication with the conductors. A die level test system includes the interconnect mounted to a temporary package for a singulated die. In the die level test system, the interconnect provides direct electrical access from testing circuitry to the die. A wafer level test system includes the interconnect mounted to a probe card fixture of a wafer probe handler. In the wafer level test system, the contact receiving cavities can be configured to support and align the interconnect to the probe card fixture.

Claims36

Dependent claims

A system for testing a semiconductor die having a contact location comprising:

a substrate comprising a surface, a cavity on the surface, a contact member on the surface configured to electrically engage the contact location on the die and a conductor on the surface extending into the cavity in electrical communication with the contact member;
and
a testing apparatus comprising an electrical connector retained in the cavity in electrical communication with the conductor to provide a direct electrical path to the contact member.

Dependencies are inferred from the claim text.

Direct connect interconnect for testing semiconductor dice and wafers

Life of this patent

Direct connect interconnect for testing semiconductor dice and wafers

Life of this patent

Abstract

Claims36