Field emission display device

A field emission display device comprises an upper plate and a lower plate that are vacuum-packaged in parallel,

• wherein said lower plate comprises:
• an insulation substrate;
• a field emitter array comprising an emitter electrode formed on the upper part of a said insulation substrate, a plurality of emitter tips formed on said emitter electrode, a gate insulation film formed apart with a certain distance from said emitter tips, and a first gate formed on said gate insulation film;
• a control thin-film transistor comprising a second gate formed on the upper part of said insulation substrate, a gate insulation film formed on the upper part of the second gate including a portion of the upper part of said insulation substrate, a first semiconductor channel formed on said gate insulation film, a first source formed to be vertically overlapped with said second gate at an end on said first semiconductor channel, a first drain formed not be vertically overlapped with said second gate at the opposite end of said first source, and a first source electrode formed on the upper part of said first source and electrically connected to said first source;
• an addressing thin-film transistor comprising a third gate formed on said insulation substrate, a gate insulation film formed on the upper part of the third gate including a portion fo the upper part of said insulation substrate, a second semiconductor channel formed on said gate insulation film, a second source and a second drain formed on a certain portion at each end of said second semiconductor channel, and a second source electrode formed on the upper part of said second source and electrically connected to said second source;
• and
• a connection electrode electrically connecting said second drain of said addressing thin-film transistor with said second gate of said control thin-film transistor.