Piezoelectric driving circuit
AssigneeNEC Corporation
InventorKyoichi Nariai
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AssigneeNEC Corporation
InventorKyoichi Nariai
Estimating the term…
Disclosed is a piezoelectric driving circuit which has: a first switching element and a first resistor, which are in series connected, being inserted between a high-potential side power source and a piezoelectric element; and a second switching element and a second resistor, which are in series connected, being inserted between a low-potential side power source and the piezoelectric element; wherein charging path is formed by turning on the first switching element and discharging path is formed by turning on the second switching element, so that a desired piezoelectric driving voltage waveform is produced.
A piezoelectric driving circuit, comprising:
A method for driving a piezoelectric element, comprising:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
The devices being field-effect transistors: the output circuit comprising more than one controlled field-effect transistor
Generating pulses having essentially a finite slope or stepped portions
Constructional details: circuitry or processes for operating piezoelectric or electrostrictive devices not otherwise provided for, e.g. drive circuits
Pulse technique
Term ended 19 Jan 2019 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
This invention relates to a piezoelectric driving circuit, and more particularly to, a piezoelectric driving waveform generating circuit with low consumed power and low heat generation.
FIG. 1 shows an example of a conventional piezoelectric driving waveform generating circuit. As shown in FIG.1, it is composed such that to piezoelectric driving waveform generated in a reference waveform generating circuit, a current amplifying circuit supplies as much current as necessary.
In this case, given that piezoelectric driving voltage (piezoelectric driving waveform output terminal voltage) is Vpzt (FIG. 2(a)), collector current of transistor Tr1 is i1 (FIG. 2(b) collector current of transistor Tr2 is i2 (FIG. 2(c)), and high-potential side power source (high-voltage side power source) is Vh, energies P1, P2 to be generated at transistors Tr1, Tr2, respectively are given by:
The invention will be explained in more detail in conjunction with the appended drawings, wherein:
FIG. 1 is a circuit diagram showing a conventional piezoelectric driving circuit,
FIG. 2 is an illustrative diagram showing the operation timing waveform of the conventional piezoelectric driving circuit,
The preferred embodiments of the invention are explained below.
In a piezoelectric driving circuit of the preferred embodiment, a first switching element and a first resistor, which are in series connected, are inserted between a high-potential side power source and a piezoelectric element, whereby charging path by the on-off control is formed, and a second switching element and a second resistor, which are in series connected, are inserted between a low-potential side power source and the piezoelectric element.
Whereby discharging path by the on-off control is formed, so that a desired piezoelectric driving voltage waveform is produced.