US 6,204,567 B1 · Semiconductor device with circuit cell array and arrangement on a semiconductor chip

Abstract

A semiconductor integrated circuit for driving an LCD. The circuit has a shift register circuit portion (3) and a driver circuit portion (7). All the stages of the shift register circuit portion are formed adjacently to the outer fringe of a chip (30). All the stages of the driver circuit portion are formed along the central line (L1) of the chip. Signal electrodes (81-8N) for individual bits are formed in a belt-like region (33) extending in the X-direction along the central line (L1) and adjacently to the driver circuit portion. Output electrodes are arranged in a zigzag fashion. Since the output electrodes overlap with each other in the Y-direction, the width of the chip can be suppressed. Power supply voltages ( VH, V0, V2, V3, V5) are applied to the driver circuit portion (7) through leads (36-40). These leads are connected so as to form a closed loop making one revolution around the output electrodes (81-8N) located in the center of the chip. The leads do not intersect with each other, thus making the impedances of the leads uniform. As a result, the nonuniformity of the contrast of the display can be suppressed.

Claims6

Dependent claims

A liquid crystal apparatus having a liquid crystal display panel with a plurality of driver IC chips for driving the panel, each of said driver IC chips having a chip layout comprising:

two sets of circuit portions, each set being composed of groups of stages that are arranged in rows, and the groups of stages of each set further forming a plurality of bit cells, with each bit cell containing said plurality of stages, wherein said two sets are separated from one another by a central region of the chip, which central region is formed between said sets along a first central line, said plurality of bit cells extend parallel to a second central line that is substantially perpendicular to the first central line;
a plurality of output electrodes in communication with said sets and arranged in said central region of said chip in a direction along said first central line;
a plurality of power source electrodes in said central region at ends of said output electrodes;
and
a plurality of dummy electrodes for alignment of said chip arranged at four corners of said chip.

2 more elements

Dependencies are inferred from the claim text.

Semiconductor device with circuit cell array and arrangement on a semiconductor chip

Life of this patent

Semiconductor device with circuit cell array and arrangement on a semiconductor chip

Life of this patent

Abstract

Claims6