SRAM cell and its fabrication process
AssigneesSharp Kabushiki Kaisha, Semiconductor Energy Laboratory Co., Ltd.
InventorsAlbert O. Adan, Jun Koyama, Shunpei Yamazaki
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Abstract
An SRAM cell comprising, at least, two driving transistors and two transfer transistors, and two load transistors each comprised of a TFT and disposed on these transistors through a layer insulation film, the load transistors having an active region comprising an Si film having improved crystallizability of amorphous Si by the solid phase growth technique using a catalytic element, and a barrier layer for preventing the catalytic element from diffusion into the driving transistors and the transfer transistors which is disposed between the layer insulation film and the load transistors.
Claims8
An SRAM cell comprising, at least two driving transistors and at least two transfer transistors, and at least two load transistors each comprised of a TFT and disposed on the driving and transfer transistors through a layer insulation film, the load transistors having an active region comprising an Si film having improved crystallizability of amorphous Si by the solid phase growth technique using a catalytic element, and a barrier layer for preventing the catalytic element from diffusion into the driving transistors and the transfer transistors which is disposed between the layer insulation film and the load transistors.
Dependencies are inferred from the claim text.