Method of making electrical connections to integrated circuit
AssigneeMitel Corporation
InventorJonathan H. Orchard-Webb
Life of this patent
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Abstract
In a method of making electrical connections to an integrated chip, an oxide layer is formed on the surface of the chip and a substrate carrying electrical connections. The conductors on the chip are accurately aligned with the conductors on the substrate. An oxide layer formed on the surface of the chip is then fusion bonded to an oxide layer on the substrate and voids remaining between the conductors filled with a conductive material. This method removes the limitation imposed by the large pad size needed for conventional techniques.
Claims9
A method of making electrical connections to an integrated circuit chip, comprising the steps of:
- providing at least one chip having conductors on its active surface, forming a first oxide layer on said active surface leaving said conductors exposed;
- providing a substrate with a second oxide on its surface having conductors corresponding to said exposed conductors on said at least one chip;
- applying a mask to said first oxide layer and etching through said first oxide layer to expose the conductors;
- lapping said etched first oxide layer to provide a flat surface;
- subsequently mounting said at least one chip on said substrate so that said conductors of said chip are in accurate alignment with the corresponding conductors on the substrate;
- joining said first and second oxide layers together directly by fusion bonding said oxide layers together without an adhesive;
- and
- filling any voids between the conductors on said at least one chip and the corresponding conductors on said substrate with a conductive material using a solder flow technique.
Dependencies are inferred from the claim text.