Method for forming high density nonvolatile memories with high capacitive-coupling ratio

A method for forming a nonvolatile memory cell with rugged tunnel oxide layers, the method comprising:

• forming a silicon oxide layer on a semiconductor substrate;
• forming a silicon nitride layer on the silicon oxide layer;
• patterning the silicon nitride layer to define a tunnel oxide region and to expose a portion of the silicon oxide layer which defines a non-tunnel region of the semiconductor substrate;
• performing a first thermal oxidation to oxidize a portion of the semiconductor substrate exposed by the silicon nitride, thereby generating a non-tunnel oxide on the semiconductor substrate;
• removing the silicon nitride layer;
• implanting ions into the semiconductor substrate to form doped regions to serve as source and drain using the non-tunnel oxide as a mask;
• performing an annealing to the semiconductor substrate and simultaneously driving the ions into the semiconductor substrate;
• removing the silicon oxide layer;
• forming a silicon layer on the semiconductor substrate, wherein the silicon layer is a material selected from the group consisting of amorphous silicon, rugged polysilicon and polysilicon;
• performing a dry etching to etch back the silicon layer and an upper portion of the doped regions;
• forming thin oxide layers on the doped regions to serve as the rugged tunnel oxide layers;
• forming a floating gate over the tunnel and non-tunnel oxides;
• forming a dielectric layer on the floating gate;
• and
• forming a control gate on the dielectric layer.