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US 6,204,076 B1Granted
Semiconductor device with unbreakable testing elements for evaluating components and process of fabrication thereof
AssigneeNEC Corporation
InventorMasanobu Zenke
Life of this patent
Estimating the term…
Abstract
A fin type storage node electrode projects from an inter-level insulating layer so as to use the top, side and back surfaces thereof for accumulation of electric charge, and testing elements for evaluating properties of the layers of the storage node electrode are concurrently formed directly on the inter-level insulating layer, thereby preventing the testing elements from undesirable breakage.
Claims6
A process of fabricating a semiconductor device, comprising the steps of:
- a) preparing a semiconductor substrate having a major surface containing a first area and a second area;
- b) forming an inter-level insulating structure over said major surface of said semiconductor substrate;
- c) forming a spacing layer on said inter-level insulating structure;
- d) removing a part of said spacing layer from a part of said inter-level insulating layer over said second area;
- e) forming a certain layer extending over a remaining part of said spacing layer over said first area and said part of said inter-level insulating layer;
- f) patterning said certain layer into a first member of at least one circuit component on said remaining part of said spacing layer and at least one second member of a testing element on said part of said inter-level insulating layer;
- g) removing said remaining part of said spacing layer so that said first member projects from said remaining part of said spacing layer;
- h) evaluating said first member by measuring a predetermined physical quantity of said at least one second member;
- and
- i) completing said at least one circuit component.
7 more elements
Dependencies are inferred from the claim text.