Data processing with progressive, adaptive, CPU-driven power management

A single chip data processing device, comprising:

• at least one functional unit for performing data processing operations;
• and
• a power management unit for managing power consumption of said data processing device, including
• an activity meter connected to said functional unit for generating an activity level signal corresponding an activity level of said functional unit independently of off-chip information,
• a clock arbiter connected to said activity meter receiving said activity level signal, said clock arbiter having three states including an up state, a hold state and a down state, said clock arbiter progressing from said up state to said hold state and from said hold state to said down state when said activity level signal indicates activity below a predetermined activity threshold, said clock arbiter progressing from said down state to said hold state and from said hold state to said up state when said activity level signal indicates activity above said predetermined activity threshold, and
• a clock generating circuit connected to said clock arbiter and supplying at least one clock signal to the single chip data processing device, said clock generating circuit supplying said at least one clock signal periodically increasing in frequency responsive to said up state, supplying said at least one clock signal at a unchanging frequency responsive to said hold state and supplying said at least one clock signal periodically decreasing in frequency responsive to said down state.