Relocatable code storage in an integrated circuit with an embedded microprocessor

An apparatus for controlling code storage in an integrated circuit including an internal memory, the apparatus comprising:

• an embedded microprocessor coupled to the internal memory and operative to interface with an external memory;
• and
• a multiplexing circuit coupled to the embedded microprocessor and the internal memory, wherein the multiplexing circuit in response to a predetermined event supplies a jump instruction to the embedded microprocessor which directs the embedded microprocessor to jump to a designated location in the external memory,
• wherein a transfer instruction stored in the designated location in the external memory is executed in response to the jump instruction, and
• wherein a transfer of code from the external memory to the internal memory is initiated in response to the transfer instruction, said transfer occurring to allocate memory resources within the integrated circuit to ensure performance of the integrated circuit during the predetermined event.

A multifunction controller comprising:

• an internal memory;
• an embedded microprocessor coupled to the internal memory and operative to interface with an external memory;
• and
• a multiplexing circuit coupled to the embedded microprocessor and the internal memory, wherein the multiplexing circuit in response to a predetermined event supplies a jump instruction to the embedded microprocessor which directs the embedded microprocessor to jump to a designated location in the external memory,
• wherein a transfer instruction stored in the designated location in the external memory is executed in response to the jump instruction, and
• wherein a transfer of code from the external memory to the internal memory is initiated in response to the transfer instruction, said transfer occurring to allocate memory resources within the integrated circuit to ensure performance of the integrated circuit during the predetermined event.