System and method for programming EPROM cells using shorter duration pulse(s) in repeating the programming process of a particular cell

A method of providing an apparatus including a programming system for programming a programmable memory device, comprising the steps of:

• providing a programming signal source configured to couple to a programmable memory device and receive a plurality of control signals and in response thereto provide a plurality of programming signals to said programmable memory device, wherein said programmable memory device includes a plurality of programmable sample memory cells and a plurality of programmable main array memory cells;
• and
• providing a programming controller, coupled to said programming signal source, configured to couple to said programmable memory device and receive a plurality of programming state signals from said programmable memory device and in response thereto provide said plurality of control signals;
• wherein said programming signal source and said programming controller cooperate in performance of the steps of:
• programming said plurality of programmable sample memory cells with a plurality of sample programming signals by applying one or more sample programming pulses to each one thereof, wherein each one of said one or more sample programming pulses has a sample programming pulse duration;
• determining a corresponding plurality of combinations of said sample programming pulse durations of said one or more sample programming pulses applied to said plurality of programmable sample memory cells;
• establishing an initial main array programming pulse duration which is approximately equal to one of said corresponding plurality of combinations of said sample programming pulse durations;
• establishing an auxiliary main array programming pulse duration which is shorter than said initial main array programming pulse duration;
• and
• programming said plurality of programmable main array memory cells with a plurality of main array programming signals by applying an initial main array programming pulse and selectively applying one or more auxiliary main array programming pulses to each one thereof, wherein said initial main array programming pulse has said initial main array programming pulse duration and each one of said one or more auxiliary main array programming pulses has said auxiliary main array programming pulse duration.

A method of programming a programmable memory device, comprising the steps of:

• coupling to a programmable memory device which includes a plurality of programmable sample memory cells and a plurality of programmable main array memory cells;
• programming said plurality of programmable sample memory cells with a plurality of sample programming signals by applying one or more sample programming pulses to each one thereof, wherein each one of said one or more sample programming pulses has a sample programming pulse duration;
• determining a corresponding plurality of combinations of said sample programming pulse durations of said one or more sample programming pulses applied to said plurality of programmable sample memory cells;
• establishing an initial main array programming pulse duration which is approximately equal to one of said corresponding plurality of combinations of said sample programming pulse durations;
• establishing an auxiliary main array programming pulse duration which is shorter than said initial main array programming pulse duration;
• and
• programming said plurality of programmable main array memory cells with a plurality of main array programming signals by applying an initial main array programming pulse and selectively applying one or more auxiliary main array programming pulses to each one thereof, wherein said initial main array programming pulse has said initial main array programming pulse duration and each one of said one or more auxiliary main array programming pulses has said auxiliary main array programming pulse duration.

A method of programming a programmable logic device comprising:

• identifying a first programming pulse in response to a plurality of sample programming pulses;
• identifying a second programming pulse, wherein the second programming pulse has a different pulse duration than the first programming pulse;
• generating the first programming pulse to allow a plurality of memory cells in the programmable logic device to be programmed;
• identifying contents stored in the plurality of the memory cells;
• and
• generating the second programming pulse to further allow the plurality of the memory cells to be programmed in response to the contents in the plurality of the memory cells.

A method of programming a programmable memory device of the type which has a plurality of programmable sample memory cells and a plurality of programmable main array memory cells, comprising the steps of:

• applying one or more sample programming pulses to each one of the plurality of programmable sample memory cells until programmed, wherein each one of said one or more sample programming pulses has a sample programming pulse duration;
• determining a corresponding plurality of combinations of said sample programming pulse durations of said one or more sample programming pulses applied to said plurality of programmable sample memory cells;
• establishing an initial main array programming pulse duration which is approximately equal to one of said corresponding plurality of combinations of said sample programming pulse durations;
• establishing an auxiliary main array programming pulse duration which is shorter than said initial main array programming pulse duration;
• and
• applying an initial main array programming pulse to said plurality of programmable main array memory cells and selectively applying one or more auxiliary main array programming pulses to each one thereof, wherein said initial main array programming pulse has said initial main array programming pulse duration and each one of said one or more auxiliary main array programming pulses has said auxiliary main array programming pulse duration.

A method of programming a programmable memory device of the type which has a plurality of programmable sample memory cells and a plurality of programmable main array memory cells, the method comprising the steps of:

• programming each one of the plurality of programmable sample memory cells using a combination of one or more sample programming pulses each of which has a sample programming pulse duration;
• determining for each one of the plurality of programmable sample memory cells a duration of the corresponding combination of one or more sample programming pulses by which it was programmed,
• establishing an initial main array programming pulse having a duration which is approximately equal to the duration of one of said corresponding combinations of one or more sample programming pulses;
• establishing an auxiliary main array programming pulse having a duration which is shorter than the duration of said initial main array programming pulse;
• and
• applying said initial main array programming pulse to said plurality of programmable main array memory cells and selectively applying one or more auxiliary main array programming pulses to each one thereof.

A method of programming a programmable memory device of the type which has a plurality of programmable sample memory cells and a plurality of programmable main array memory cells, the method comprising the steps of:

• determining for each one of the plurality of programmable sample memory cells a combination of one or more sample programming pulses required to program it;
• establishing an initial main array programming pulse having a duration which is approximately equal to a duration of one of said combinations of one or more sample programming pulses;
• establishing an auxiliary main array programming pulse having a duration which is shorter than the duration of said initial main array programming pulse;
• and
• applying said initial main array programming pulse to said plurality of programmable main array memory cells and selectively applying one or more auxiliary main array programming pulses to ones of said plurality of programmable main array memory cells.