U-interface matching circuit and method

Abstract

A U-interface matching circuit and matching method is disclosed. The circuit includes a plurality of BRI (Basic Rate Interface) boards implementing a digital subscriber's matching, a control board controlling operating modes of the plurality of BRI boards and an SA (Serial Access)-bus providing an independent data transmission path with regard to the plurality of BRI boards. The method includes a first step identifying mounting locations of a plurality of BRI boards, a second step reading an RX flag area of a first BRI board for data transmission and identifying whether the read RX flag is a flag representing the access complete of the first BRI board, a third step setting the first BRI mode as a write mode and transmitting the data length value and transmission data when the RX flag is a flag representing an access complete of the first BRI board, and a fourth step receiving transmission data of the first BRI board. The method further includes a first step setting a read mode by a control board, a second step reading a TX flag area and identifying whether the read TX flag represents an access complete of the control board, a third step transmitting a data length value and transmission data to the control board when the TX flag is a flag representing an access complete of the control board, and a fourth step receiving the data from the control board.

Dependencies are inferred from the claim text.