Personal computer interrupt line sharing circuit with active interrupt line monitoring, and method for sharing a common interrupt line by active monitoring

A computer system comprising:

• a plurality of peripheral devices,
• a computer including an extended bus;
• and
• a common interrupt line provided in common to said plurality of peripheral devices;
• said computer being configured to perform a predetermined input/output access when said computer has completed an interrupt processing;
• each of said plurality of peripheral devices has an interrupt line sharing circuit, said interrupt line sharing circuits each include:
• a local interrupt line connected in common to said common interrupt line;
• an input/output monitor connected to said extended bus, said input/output monitor monitors whether or not said predetermined input/output access has been performed through said extended bus;
• an interrupt line monitor connected to said local interrupt line, said interrupt line monitor monitors said common interrupt line, and determines that an interrupt processing is started if an interrupt request is sent onto said common interrupt line from any one of said plurality of peripheral devices, said interrupt line monitor further is connected to said input/output monitor, and determines that said interrupt processing has been completed when said input/output monitor detects said predetermined input/output access;
• and
• an interrupt line control connected to receive an interrupt request generated in a corresponding peripheral device, and coupled to said interrupt line monitor, said interrupt line control sends said interrupt request generated in said corresponding peripheral device, to said local interrupt line after said completion of said interrupt processing.

A method for sharing one common interrupt line provided in common to a plurality of peripheral devices in a computer system, said method comprising the acts of:

• causing a computer to perform a predetermined input/output access when said computer has completed an interrupt processing;
• determining that an interrupt processing is started if an interrupt request is sent onto said common interrupt line from any one of said plurality of peripheral devices;
• determining that said interrupt processing has been completed when said predetermined input/output access is detected;
• and
• determining a busy/not-busy state of said common interrupt line on the basis of said determining that an interrupt processing is started and on the basis of said determining that said interrupt processing has been completed;
• and
• sending an interrupt request generated in one of said plurality of peripheral devices to said common interrupt line after said determining that said interrupt processing is completed.

A peripheral device coupled to a host through a common interrupt line, said peripheral device comprising:

• a first monitor which monitors signals generated by said host;
• a second monitor which monitors said common interrupt line to determine whether an interrupt processing has begun, and said second monitor further analyzes said signals from said host, received by said first monitor, to determine if said interrupt processing has completed;
• and
• a controller which allows access to said common interrupt line when said second monitor determines that an interrupt processing has not begun and when said second monitor determines that any existing interrupt processing has completed.