US 6,192,160 B1 · Hardware architectures for image dilation and erosion operations

Abstract

A hardware architecture for mathematical morphology operations such as dilation and erosion of an image signal is provided. A hardware architecture for an image dilation operation includes: a plurality of adders corresponding to the size of the structuring element for adding the image signal and a structuring element symmetrical to the image signal with respect to the origin to output the result; a plurality of stores for temporarily storing the signals output from the plural adders; a comparator for comparing data stored in the plural stores with feedback data to output the maximum data; and an outputting device for outputting the output signal of the comparator as a dilation operation value if the dilation operation with respect to all structuring elements for one image signal is completed and feeding back the output signal of the comparator as input data of the comparator if not. Therefore, the elementary operations such as dilation and erosion with respect to a gray-level image signal can be attained by a simple arithmetic operation, that is, by finding the maximum/minimum value using an adder. Also, since the hardware architecture for the dilation and erosion operations adopts a feedback structure, the volume of the hardware linearly increases even though the size of the structuring element increases in geometrical progression.

Claims7

Dependent claims

A hardware architecture for a dilation operation, comprising:

a plurality of adding means for receiving a plurality of pixel data of an image signal, for receiving a plurality of structuring element data, wherein each of said structuring element data corresponds to one of the pixel data, and for adding the pixel data to the corresponding structuring element data to output an added result;
a plurality of storing means for storing the added results from said plurality of adding means;
comparing means for receiving the added results from each of said plurality of storing means, for receiving an intermediate feedback data during the dilation operation, and for comparing the added results from each of the plurality of storing means with each other and with the intermediate feedback data to create a maximum data until each of the plurality of added results from each of the storing means have been compared;
and
outputting means for feeding back the maximum data from said comparing means as the intermediate feedback data to the comparing means, and, after the dilation operation is completed, for outputting the maximum data.

2 more elements

A hardware architecture for an erosion operation, comprising:

a plurality of subtracting means for receiving a plurality of pixel data of an image signal, for receiving a plurality of structuring element data, wherein each of said structuring element data corresponds to one of the pixel data, and for subtracting the pixel data to the corresponding structuring element data to output a subtracted result;
a plurality of storing means for storing the subtracted results from said plurality of subtracting means;
comparing means for receiving, the subtracted results from each of said plurality of storing means, for receiving an intermediate feedback data during the erosion operation, and for comparing the subtracted results from each of the plurality of storing means with each other and with the intermediate feedback data to create a minimum data until each of the plurality of subtracted results from each of the storing means have been compared;
and
outputting means for feeding back the minimum data from said comparing means as the intermediate feedback data to the comparing means, and, after the erosion operation is completed, for outputting the minimum data obtained after the last subtracted result has been compared with the intermediate feedback data.

2 more elements

A hardware architecture for dilation and erosion operations, comprising:

control signal generating means for generating a control signal determining whether to perform either dilation or erosion operation with respect to said image signal;
a plurality of operating means for receiving a plurality of pixel data of an image signal, for receiving a plurality of structuring element data, wherein each of said structuring element data corresponds to one of the pixel data, and for adding the pixel data to the corresponding structuring element data to output an added result if the dilation operation is selected by the control signal or for subtracting the structuring element data from the pixel data to output a subtracted result if the erosion operation is selected by the control signal;
a plurality of storing means for temporarily storing the added results or subtracted results from said plurality of operating means;
comparing means for receiving the added results or subtracted results from each of said plurality of storing means, for receiving an intermediate feedback data during the dilation and erosion operations, and for comparing the added results or subtracted results from each of the plurality of storing means with each other and with the intermediate feedback data to create a maximum data thereamong if the dilation operation is selected by the control signal or the minimum data thereamong if the erosion operation is selected by the control signal until each of the plurality of added results or subtracted results from each of the storing means have been compared;
and
outputting means for feeding back the maximum data or minimum data from said comparing means as the intermediate feedback data to the comparing means, and, after the dilation and erosion operations are completed, for outputting the maximum data or minimum data.

3 more elements

Dependencies are inferred from the claim text.

Hardware architectures for image dilation and erosion operations

Life of this patent

Hardware architectures for image dilation and erosion operations

Life of this patent

Abstract

Claims7