Magnetic random access memory circuit
AssigneeNEC Corporation
InventorsSadahiko Miura, Hideaki Numata
Life of this patent
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AssigneeNEC Corporation
InventorsSadahiko Miura, Hideaki Numata
Estimating the term…
A magnetic random access memory circuit comprises first and second row decoders receiving a part of a given address, first and second column decoders receiving the other part of a given address, a plurality of pairs of sense lines connected between output terminals of the first row decoder and output terminals of the second row decoder, each pair of sense lines being located adjacent to each other, a plurality of word lines connected between output terminals of the first column decoder and output terminals of the second column decoder, and extending to intersect the sense lines so that intersections of the sense lines and the word lines are located in the form of a matrix. A memory array includes a plurality of cell pairs distributed over the matrix, each cell pair including a memory cell and a reference cell located adjacent to each other. Each of the memory cell and the reference cell includes a magneto-resistive element. The memory cell and the reference cell of each cell pair are located at intersections of one word line and one pair of sense lines, respectively. The memory cell of the each cell pair is connected between one sense line of the one pair of sense lines and the one word line, and the reference cell of the each cell pair is connected between the other sense line of the one pair of sense lines and the one word line.
A magnetic random access memory circuit comprising:
A magnetic random access memory circuit comprising:
Dependencies are inferred from the claim text.