Compliant surface layer for flip-chip electronic packages and method for forming same

Electronic equipment comprising:

• an integrated circuit chip;
• a circuitized organic dielectric chip carrier having a first set of contacts on a first surface and a second set of contacts on a second surface opposite said first surface, with contacts in said second set electrically connected to contacts in said first set;
• solder connections between said chip and carrier;
• an underfill layer around said solder connections;
• a compliant layer of an interpenetrating polymer network between said underfill layer and said chip carrier and including openings corresponding to the solder connections;
• a circuitized organic substrate having contacts on at least one surface;
• and
• an array of solder connections between contacts on said substrate and said second set of contacts on said carrier.

A method for connecting an integrated circuit chip to a substrate comprising an organic dielectric chip carrier having an array of contacts on at least one surface, comprising:

• providing an array of primary solder members projecting from an active surface of said chip;
• applying a compliant layer of an interpenetrating polymer network to said surface of said substrate, covering the contacts on said surface;
• forming openings in said compliant layer to allow access to the contacts on said substrate;
• positioning said integrated circuit chip on said compliant layer with said projecting solder members aligned with said openings;
• and heating the solder members to allow solder to flow through said openings and complete electrical connections between said chip and said contacts;
• and
• forming a layer of underfill material around said solder connections between the compliant layer and the chip.

A method for assembling electronic components comprising:

• providing an integrated circuit chip having an array of primary solder members projecting from an active surface of said chip;
• providing a circuited organic dielectric chip carrier having a first set of contacts on a first surface and a second set of contacts on a second surface opposite to said first surface, with contacts in said second set electrically connected to contacts in said first set;
• forming an underfill layer around said projecting solder members, between said carrier and said chip;
• forming a compliant layer having openings corresponding to said projecting solder members and said contacts on said carrier and a modulus of 100,000 psi or less on said first surface of said chip carrier;
• positioning said integrated circuit chip on said compliant layer with said projecting solder member aligned with said openings;
• and heating the solder members to allow solder to flow through said openings and complete electrical connections between said chip and said contacts;
• bonding an array of secondary solder members to contacts on the second surface of said carrier;
• providing a circuitized organic printed circuit board, card or other substrate having contacts on at least one surface;
• positioning said carrier with said secondary solder members in contact with contacts on said substrate;
• and
• reflowing said secondary solder members to complete electrical connections from said integrated circuit chip through said primary solder members and said secondary solder members to said substrate.