# US 6,191,712 B1 · Circuit for aligning logical sectors with physical sectors in a disk storage system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 6,191,712 B1 - Document ID: US6191712B1 - Status: Granted - Kind: B1 - Application number: 09/340,376 - Filed: 1999-06-28 - Granted: 2001-02-20 - Earliest claimed: 1999-06-28 - Assignees: International Business Machines Corporation - Inventors: Charles Lee Still - Web page: https://patentgrep.com/patent/US6191712B1 ## CPC - G06F 3/0608: {Saving storage space on storage systems} - G06F 3/0613: {in relation to throughput} - G06F 3/064: {Management of blocks} - G06F 3/0661: {Format or protocol conversion arrangements} - G06F 3/0676: {Magnetic disk device} - G11B 20/1217: {on discs} - G11B 2020/1232: {sector, i.e. the minimal addressable physical data unit} - G11B 2020/1288: {Formatting by padding empty spaces with dummy data, e.g. writing zeroes or random data when de-icing optical discs} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11B: INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER (recording measured values in a way that does not require playback through a transducer G01D9/00; recording or playback apparatus using mechanically marked tape, e.g. punched paper tape, or using unit records, e.g. punched or magnetically marked cards G06K; transferring data from one type of record carrier to another G06K1/18; circuits for coupling output of reproducer to radio receiver H04B1/20; gramophone pick-ups or like acoustic electromechanical transducers or circuits therefor H04R) ## Abstract A circuit manages the conversion of data between a logical sector format and a physical sector format. In a padding mode, the circuit appends a padding value to a data stream in the logical sector format having a logical length to produce a data stream in a physical sector format having a physical length. In an extracting mode, the circuit extracts a data stream in the logical sector format from a data stream in the physical sector format. ## Claims ### Claim 1 A circuit for appending a padding value to a first data stream having a logical length, to produce a second data stream that when recorded in a recording device will occupy a determined physical length on said recording device that matches an operating requirement of said recording device, said logical length and said physical length measured in data units, said circuit comprising: a switch having a first input for receiving said first data stream, a second input for receiving said padding value, and an output for transmitting said second data stream, said switch controllable to route either said first input or said second input to said output; a logical length counter to count data units of said first data stream, and having an output indicating when said logical length has been counted; a physical length counter to count data units of said second data stream, and having an output indicating when said physical length has been counted; a controller, responsive to said outputs from said logical length counter and said physical length counter, for controlling said switch to select said first data stream until said logical length has been counted, and then to control said switch to select said padding value until said physical length has been counted. ### Claim 2 (depends on 1) The circuit recited in claim 1, further comprising a data latch having an input for receiving said second data stream from said output of said switch, and an output for transmitting said second data stream, said data latch controllable to enable or disable said input for receiving said second data stream. ### Claim 3 (depends on 1) The circuit recited in claim 1, further comprising a sector counter to count sectors of said second data stream, and having an output indicating when said sectors have been counted. ### Claim 4 (depends on 1) The circuit recited in claim 1, further comprising a logical length register for holding a value representing said logical length, wherein said logical length counter is loaded from said logical length register. ### Claim 5 (depends on 1) The circuit recited in claim 1, further comprising a physical length register for holding a value representing said physical length, wherein said physical length counter is loaded from said physical length register. ### Claim 6 (depends on 1) The circuit recited in claim 1, further comprising a padding value register for holding said padding value, wherein said second input of said switch receives said padding value from said padding value register. ### Claim 7 (depends on 1) The circuit recited in claim 1, wherein said data unit is a byte. ### Claim 8 A circuit for extracting a first data stream having a logical length, from a second data stream having a determined physical length that matches an operating requirement of a recording device, said logical length and said physical length measured in data units, said circuit comprising: a data latch having an input for receiving said second data stream, and an output for transmitting said first data stream, said data latch controllable to enable or disable said input for receiving said second data stream; a logical length counter to count said data units of said first data stream, and having a n output indicating when said logical length has been counted; a physical length counter to count said data units of said second data stream, and having an output indicating when said physical length has been counted; a controller, responsive to said outputs from said logical length counter and said physical length counter, for controlling said data latch to enable said input for receiving said second data stream until said logical length has been counted, and then to control said data latch to disable said input for receiving said second data stream until said physical length has been counted. ### Claim 9 (depends on 8) The circuit recited in claim 8, further comprising a sector counter to count sectors of said second data stream, and having an output indicating when said sectors have been counted. ### Claim 10 (depends on 8) The circuit recited in claim 8, further comprising a logical length register for holding a value representing said logical length, wherein said logical length counter is loaded from said logical length register. ### Claim 11 (depends on 8) The circuit recited in claim 8, further comprising a physical length register for holding a value representing said physical length, wherein said physical length counter is loaded from said physical length register. ### Claim 12 (depends on 8) The circuit recited in claim 8, wherein said controller provides an output indicating that said output of said data latch is transmitting said first data stream. ### Claim 13 (depends on 8) The circuit recited in claim 8, wherein said data unit is a byte. ### Claim 14 A circuit, capable of operating in a padding mode or an extracting mode, said padding mode for appending a padding value to a first data stream having a logical length, to produce a second data stream that when recorded in a recording device will occupy a determined physical length on said recording device that matches an operating requirement of said recording device, and said extracting mode for extracting said first data stream from said second data stream, said logical length and said physical length measured in data units, said circuit comprising: a switch having a first input for receiving said first data stream, a second input for receiving said padding value, and an output for transmitting said second data stream, said switch controllable to route either said first input or said second input to said output; a first data latch having an input for receiving said second data stream, and an output for transmitting said first data stream, said first data latch controllable to enable or disable said input for receiving said second data stream; a logical length counter to count said data units of said first data stream, and having an output indicating when said logical length has been counted; a physical length counter to count said data units of said second data stream, and having an output indicating when said physical length has been counted; a controller, responsive to said outputs from said logical length counter and said physical length counter, wherein in said padding mode, said controller controls said switch to select said first data stream until said logical length has been counted, and then to control said switch to select said padding value until said physical length has been counted; and in said extracting mode, said controller controls said first data latch to enable said input for receiving said second data stream until said logical length has been counted, and then to control said first data latch to disable said input for receiving said second data stream until said physical length has been counted. ### Claim 15 (depends on 14) The circuit recited in claim 14, further comprising a second data latch having an input for receiving said second data stream from said output of said switch, and an output for transmitting said second data stream, said second data latch controllable to enable or disable said input for receiving said second data stream. ### Claim 16 (depends on 14) The circuit recited in claim 14, further comprising a sector counter to count sectors of said second data stream, and having an output indicating when said sectors have been counted. ### Claim 17 (depends on 14) The circuit recited in claim 14, further comprising a logical length register for holding a value representing said logical length, wherein said logical length counter is loaded from said logical length register. ### Claim 18 (depends on 14) The circuit recited in claim 14, further comprising a physical length register for holding a value representing said physical length, wherein said physical length counter is loaded from said physical length register. ### Claim 19 (depends on 14) The circuit recited in claim 14, further comprising a padding value register for holding said padding value, wherein said second input of said switch receives said padding value from said padding value register. ### Claim 20 (depends on 14) The circuit recited in claim 14, wherein said controller provides an output indicating that said output of said first data latch is transmitting said first data stream. ### Claim 21 (depends on 14) The circuit recited in claim 14, wherein said data unit is a byte.