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US 6,191,609 B1Granted
Combination of global clock and localized clocks
AssigneeLattice Semiconductor Corporation
InventorsAlbert Chan, Ju Shen, Cyrus Y. Tsui, Allan T. Davidson
Life of this patent
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Abstract
A programmable logic device includes a global clock structure and a plurality of localized clock structures. Each localized clock structure distributes a respective localized clock signal to a corresponding portion of the programmable logic device. The global clock structure distributes a global clock signal to all portion of the programmable logic device.
Claims2
A programmable logic device, comprising:
- a plurality of state elements, each having a clock input terminal provided in first and second regions of said programmable logic device, said first and second regions being non-overlapping;
- a first conductor provided in said programmable logic device within said first region but not in said second region;
- a second conductor provided in said programmable logic device within said second region, but not in said first region;
- a first input terminal, coupled to said first conductor, for receiving a first input signal from outside of said programmable logic device;
- a second input terminal, coupled to said second conductor, for receiving a second input signal from outside of said programmable logic device;
- and
- a programmable circuit for selectably coupling said first input signal from said first conductor to said clock input terminals of said state elements provided in said first region and said second input signal from said second conductor to said clock input terminals of said state elements provided in said second region.
4 more elements
Dependencies are inferred from the claim text.