Scan test apparatus for continuity testing of bare printed circuit boards
AssigneeDelaware Capital Formation, Inc.
InventorMark A. Swart
Life of this patent
Estimating the term…
Abstract
A scan test apparatus for continuity testing of bare printed circuit boards having a first shorting layer and a second shorting layer positioned adjacent a unit under test to electrically short the circuit on the unit under test. At least one of the first or second shorting layers includes a row of wipers for generating test signals as the wiper contacts test sites on the unit under test as the unit under test is moved across the wiper. Measurement electronics are electrically connected to the wiper for receipt of the test signals for comparison to stored data and elimination from further testing if the test signals and stored data match.
Claims20
A scan test apparatus for continuity testing of bare printed circuit boards comprising:
- a first shorting layer and a second shorting layer arranged to electrically short a unit under test;
- a wiper extending across a width of at least one of the first or second shorting layers for generating test signals as the wiper contacts test sites on the unit under test;
- means for moving the unit under test past the wiper;
- and
- measurement electronics electrically connected to the wiper for receipt of the test signals for comparison to stored data and elimination from further testing.
The scan test apparatus for continuity testing of bare printed circuit boards comprising:
- means for introducing an electrical shorting current into a unit under test;
- means for generating test signals by wiping test sites on the unit under test across an entire width of the unit under test;
- means for moving the unit under test into contact with the means for generating test signals;
- and
- means for comparing the test signals with stored test data and eliminating the test sites from further testing if the test signals match the stored test data.
A method of continuity testing a printed circuit board comprising the steps of:
- shorting the printed circuit board;
- wiping test sites on the printed circuit board;
- generating test signals from the test sites;
- comparing the test signals to control data;
- and
- eliminating the test sites from further testing if the test signals match the control data.
Dependencies are inferred from the claim text.