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US 6,191,029 B1Granted
Damascene process
AssigneesUnited Silicon Incorporated, United Microelectronics Corp.
InventorsHsi-Mao Hsiao, Chun-Lung Chen, Shin-Fa Lin
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Abstract
A damascene process is described. An opening is formed in a dielectric layer. The opening is filled with a conductive plug. The conductive plug is etched back to substantially reduce the thickness of the conductive plug in the dielectric layer. A conformal top barrier layer is formed over the conductive plug.
Claims19
A damascene process, comprising:
- forming an opening in a dielectric layer;
- filling the opening with a conductive plug having an upper portion;
- removing the upper portion of the conductive plug, thereby forming a concavity over the conductive plug in the dielectric layer;
- partially filling the concavity with a top barrier layer conformal to the dielectric layer;
- over-filling the concavity with a spin-on-glass layer over the top barrier layer;
- and
- removing portions of the spin-on-glass layer and the top barrier layer that lie over the dielectric layer, thereby forming an electrical interconnect in the opening.
4 more elements
A damascene process, comprising:
- forming an opening in a dielectric layer;
- filling the opening with a conductive plug, wherein the conductive plug comprises a first barrier layer and a metal layer in the opening;
- etching back the conductive plug, thereby substantially reducing the thickness of the conductive plug in the dielectric layer;
- and
- forming a second barrier layer and a SOG layer in the dielectric layer, wherein the second barrier layer and the SOG layer are formed over the conductive plug.
2 more elements
Dependencies are inferred from the claim text.