Method of patterning a layer for a gate electrode of a MOS transistor

A method of fabricating transistors, comprising:

• forming a gate oxide layer of less than 10 Å on a semiconductor substrate;
• forming a first layer over the gate oxide layer;
• forming a second layer over the first layer;
• forming a third layer over the second layer, the third layer including nitrogen such that, when formed directly on the first layer causes stresses between the first layer and the third layer, but the second layer securing to relieve stresses between the first layer and the third layer, the second layer and the third layer forming a masking layer over the first layer;
• forming a photoresist layer over the masking layer;
• patterning the photoresist layer to form at least first and second photoresist portions with an opening between the photoresist portions;
• etching through the masking layer in an area between the photoresist portions to leave masking portions of the masking layer below the photoresist portions with the opening between the masking portions;
• removing the photoresist portions;
• after removal of the photoresist portions, etching through the first layer in an area between the masking portions, at least until the gate oxide layer is exposed without substantial breakthrough through the gate oxide layer, with the masking portions at least partially preventing etching of portions of the first layer below the masking portions;
• forming silicide regions where the gate oxide layers are exposed;
• forming electrical contacts on the silicide regions;
• and
• etching the mask with an etchant that selectively removes materials of the masking portions including the nitrogen containing third layer, selectively over the first layer.