Recirculating register file
AssigneeArm Limited
InventorsChristopher Neal Hinds, David Vivian Jaggar, David Terrence Matheny, David James Seal
Life of this patent
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Abstract
A floating point unit having a register bank containing a plurality of registers supports vector operations that execute a specified operation a plurality of times upon a sequence of data values form different registers. The register bank is divided into subsets and with the sequence of registers used in a vector operation wrapping within a subset. The subsets comprise disjoint, contiguous ranges of register numbers. The wrapping within ranges allows compact code and efficient to be provided for performing DSP operations, such as FIR filtering and matrix transformations.
Claims17
An apparatus for processing data, said apparatus comprising:
- a register bank having a plurality of addressable scalar registers, at least a portion of said scalar registers comprising at least one vector register;
- and
- an instruction decoder, responsive to at least one data processing instruction specifying a vector operation, that executes a data processing operation a plurality of times using data values from said at least one vector register starting with an initial scalar register specified in said data processing instruction;
- wherein
- said register bank includes at least one subset of scalar registers, said at least one vector register being within said subset;
- and
- said instruction decoder controls said at least one vector register to wrap within said subset of registers.
A method of processing data, said method comprising the steps of:
- storing data values within a plurality of addressable scalar registers of a register bank, at least a portion of said scalar registers comprising at least one vector register;
- and
- in response to at least one data processing instruction specifying a vector operation, executing a data processing operation a plurality of times using data values from said at least one vector register starting with an initial scalar register specified on said data processing instruction;
- wherein
- said register bank includes at least one subset of scalar registers, said at least one vector register being within said subset;
- and
- during said executing, said at least one vector register wraps within said subset of registers.
Dependencies are inferred from the claim text.