Multi-master bus system performing atomic transactions and method of operating same
AssigneeMotorola, Inc.
InventorsItai Katz, Moti Kurnick, Noam Halevi, Vladislav Kopzon
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AssigneeMotorola, Inc.
InventorsItai Katz, Moti Kurnick, Noam Halevi, Vladislav Kopzon
Estimating the term…
A multi-master bus system (10) comprises bus (12), a plurality of bus devices (14, 16, 18, 20, 22, 24), coupled to the bus, including masters (14, 16, 18), and slaves (20, 22, 24), a memory controller (26) for controlling the data exchange on bus (12), having a memory (36) for storing a transaction type value with respect to each slave (20, 22, 24). The multi-master bus system (10) comprises further an arbiter (30) for performing bus arbitration, arbiter (30) having logic for conditionally subsequently granting the bus (12) to a master of an initiating transaction for a closing transaction depending on the transaction type value of the slave of the initiating transaction. The multi-master bus system makes atomic or indivisible transactions possible on a bus without changing the bus width or the bus protocol.
A multi-master bus system comprising
A multi-master bus system comprising
A multi-master bus system comprising
A method of operating a bus, the method comprising the steps of:
A method of operating a bus, the method comprising the steps of:
A method of operating a bus, the method comprising the steps of:
A method of operating a bus, the method comprising the steps of:
Dependencies are inferred from the claim text.