Data reproduction apparatus for character multiplexing video signal
AssigneeKabushiki Kaisha Toshiba
InventorsKoji Kato, Masayuki Watanabe
Life of this patent
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Abstract
A data reproduction apparatus for character multiplexing video signal includes an A/D converter circuit for converting a character multiplexing video signal into a digital video signal, an FC detecting/clock generating circuit for detecting an FC signal contained in the digital video signal to generate a clock signal for character data reproduction, a delay circuit for delaying the digital video signal by a period of time corresponding to time required for the FC detecting/clock generating circuit to generate the clock signal, and a data reproducing circuit for reproducing character data by sampling the digital video signal which is time-adjusted by the delay circuit by use of the clock signal.
Claims13
A data reproduction apparatus for character multiplexing video signal comprising:
- an A/D converter circuit for converting a character multiplexing video signal into a digital video signal;
- a framing code detecting/clock generating circuit for receiving the digital video signal from said A/D converter circuit and detecting a framing code signal contained in the received signal to generate a clock signal for character data reproduction;
- a delay circuit for delaying the digital video signal input from said A/D converter circuit by a period of time corresponding to time required for said framing code detecting/clock generating circuit to generate the clock signal;
- and
- a data reproducing circuit for reproducing character data by sampling the digital video signal delayed by said delay circuit in synchronism with the clock signal generated from said framing code detecting/clock generating circuit.
Dependencies are inferred from the claim text.