Image processing device

An image processing device for processing pixel data interpolation operations in parallel under single instruction multiple data stream control, comprising:

• a plurality of element processors for carrying out said pixel data interpolation operations;
• a random access memory for storing filter coefficient sets utilized in said interpolation operations, and
• a controller for putting plurality of said element processors under single instruction multiple data stream control;
• said random access memory supplying filter coefficient sets corresponding to a phase when a pixel interval of an original image is divided by a prescribed dividing number;
• wherein said phase is closest to the phases of pixel data to be processed and is the distance of a source image pixel to a generated image pixel;
• wherein a prescribed element processor carries out processing of said pixel data interpolation operations utilizing pixel data and filter coefficient sets possessed by a plurality of peripheral element processors.

An image processing device for processing pixel data interpolation operations in parallel under single instruction multiple data stream control, comprising:

• a plurality of element processors for carrying out said pixel data interpolation operations;
• a random access memory for storing filter coefficient sets utilized in said interpolation operations;
• and
• a controller for putting a plurality of said element processors under single instruction multiple data stream control,
• said random access memory supplying said pixel data to a plurality of said element processors so that types of patterns for the positional relationships of peripheral element processors which have pixel data utilized by a prescribed element processor,
• wherein said prescribed element processors are reduced to the smallest possible number.

An image processing device for carrying out parallel processing for pixel data interpolation operations under single instruction multiple data stream control in association with enlarging or reducing of an image, said image processing device comprising:

• a plurality of element processors for carrying out said pixel data interpolation operations, said pixel data being supplied via an input bus to a plurality of said element processors;
• and
• a controller for putting a plurality of said element processors under single instruction multiple data stream control,
• a plurality of said element processors being also supplied with filter coefficient sets used in said interpolation via said input bus, and
• each of said element processors carrying out said pixel data interpolation processing using said filter coefficient sets corresponding to phases of said pixel data associated with enlarging or reducing of said image, wherein
• said phase is the distance of a source image pixel to a generated image pixel.

An image processing device for carrying out parallel processing for pixel interpolation operations under signal instruction multiple data stream control in association with enlarging or reducing of an image, said image processing device comprising:

• a plurality of element processors for carrying out said pixel data interpolation operations, said pixel data being supplied via an input bus to a plurality of said element processors, and
• a controller for putting a plurality of said element processors under single instruction multiple data stream control,
• a plurality of said element processors being also supplied with filter coefficient sets used in said interpolation via a circuit different from said input bus, and
• each of said element processors carrying out said pixel data interpolation processing using said filter coefficient sets corresponding to phases of said pixel data associated with enlarging or reducing of said image, wherein
• said phase is the distance of a source image pixel to a generated image pixel.

An image processing device for carrying out parallel processing for pixel interpolation operations under single instruction multiple data stream control in association with enlarging or reducing of an image formed with supplied pixel data, said image processing device comprising:

• a plurality of element processors for carrying out said pixel data interpolation operations, said pixel data being supplied via an input bus to a plurality of said element processors, and
• a controller for putting a plurality of said element processors under single instruction multiple data stream control,
• each of said element processors calculating filter coefficient sets used in said interpolation in accordance with phase information of pixel data allotted to each of said element processors, and carrying out said pixel data interpolation processing using said filter coefficient sets, wherein
• said phase is the distance from a source image pixel to a generated image pixel.