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US 6,188,627 B1Granted
Method and system for improving DRAM subsystem performance using burst refresh control
AssigneeInternational Business Machines Corporation
InventorsHerman Lee Blackmon, Robert Allen Drehmel, Kent Harold Haselhorst, William Paul Hovis, James Anthony Marcella
Life of this patent
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Abstract
A method and system for improving DRAM performance using burst refresh control reduces the overhead associated with refreshing DRAM in a computer system, making the memory more available to the devices that access it. Limiting the burst cycle to less than the entire DRAM array provides a lower latency than existing full DRAM burst techniques.
Claims17
A method for improving memory subsystem performance comprising, in sequence, the steps of:
- programming a register with a burst count value;
- preventing access to a memory by one or more devices connected to said memory;
- generating refresh cycles from a refresh controller external to said memory, while continuing to prevent access to said memory until a number of refresh cycles equal to said burst count value have been generated;
- and
- restoring access to said memory only after said number of refresh cycles have been generated by said refresh controller.
2 more elements
A memory refresh controller comprising:
- memory interface means for coupling an external memory;
- timer means for generating refresh requests;
- access prevention means for preventing devices from accessing said external memory;
- and
- counter means for counting a quantity of refresh cycles to be produced at each refresh request, wherein said quantity of refresh cycles is more than one, but less than the refresh cycles required to refresh all of said external memory, and wherein said access prevention means operates to prevent devices from accessing said external memory until said quantity of refresh cycles is produced.
2 more elements
A memory refresh controller comprising:
- memory interface means for coupling an external memory;
- timer means for generating refresh requests;
- access prevention means for preventing devices from accessing said external memory;
- and
- counter means for counting a quantity of refresh cycles to be produced at each refresh request wherein said quantity of refresh cycles is more than one, but less than all of the refresh cycles required to refresh said external memory, and wherein said access prevention means operates to prevent devices from accessing said external memory until said quantity of refresh cycles is produced;
- and
- register means for storing a burst count, wherein said burst count determines said quantity of refresh cycles.
4 more elements
Dependencies are inferred from the claim text.