Flash memory cell & array with improved pre-program and erase characteristics
AssigneeAMIC Technology Corporation
InventorsDavid K. Y. Liu, Kou-Su Chen, Vei-Han Chan
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AssigneeAMIC Technology Corporation
InventorsDavid K. Y. Liu, Kou-Su Chen, Vei-Han Chan
Estimating the term…
A circuit and method for achieving an improved pre-programming of flash memory cells is disclosed. The invention, when used to condition flash memory cell arrays, results in increased endurance of such arrays, and eliminates the need for hot electron pre-programming operations. By eliminating the need to pre-program the memory array with hot electrons, the invention provides a signicant improvement for flash arrays, because device life and reliability is extended. In addition, pre-programming time and power is reduced significantly since the operation takes place on a sector (parallel) basis rather than a single bit line (serial) basis, and a charge pump is not needed to generate the current injected into floating gates of cells in the sector.
A method of pre-programming a memory cell in a flash memory cell array, said cell including a floating gate, a control gate, and a source connected through a channel to a drain, said cell further being situated within a first well having a first conductivity type, and said first well being situated within a second well having a second conductivity type, said method including the step of:
A method of controlling a distribution of threshold voltages of memory cells in a sector of a flash memory cell array, each of said cells in said sector including a floating gate, a control gate, and a source connected through a channel to a drain, said cells in said sector further being situated within a first well having a first conductivity type, and the first well being situated within a second well having a second conductivity, and said second well being situated within a substrate, such that said second well, first well and source and/or drain form a bipolar device, said method including the step of:
A flash memory cell for use in a flash memory cell array, said cell being situated in a first well having a first conductivity, and such that the first well is situated within a second well having a second conductivity type, said cell comprising:
A flash memory cell array comprising:
Dependencies are inferred from the claim text.