Method and apparatus for reducing phase noise in a voltage controlled oscillator circuit

A method of reducing phase noise in a voltage controlled oscillator(VCO), comprising the steps of:

• biasing an active device with a bias voltage (Vb);
• applying a control voltage (Vc) to the VCO;
• determining a slope based on changing control voltage versus changing bias voltage (ΔVc/ΔVb)for a predetermined bias voltage range(Vb);
• and
• locating a minimum phase noise region based on the slope determined within the predetermined bias voltage range.

A method of minimizing phase noise in a voltage controlled oscillator (VCO) of a PLL which includes an active device having a base, comprising the steps of:

• biasing the base of the active device with a bias voltage;
• generating a control voltage from the PLL in response to the base bias voltage biasing the active device;
• sweeping the base bias voltage while monitoring the control voltage over a predetermined bias voltage range;
• measuring a slope of the control voltage versus the base bias voltage over the swept bias voltage in order to represent phase noise within the swept bias voltage range;
• and
• locating a minimum phase noise region based on the slope.

A method of minimizing phase noise in a voltage controlled oscillator (VCO) having an active device, comprising the steps of:

• applying a bias voltage to the active device;
• generating a VCO output frequency signal in response to the bias voltage;
• dividing the VCO output frequency into a divided signal;
• comparing the divided VCO output frequency to a reference frequency thereby detecting a phase error within the divided signal;
• generating a DC voltage based on the phase error;
• filtering the DC voltage to provide a VCO control voltage;
• taking a derivative of the VCO control voltage versus the bias voltage over a predetermined bias voltage range;
• and
• locating a minimum phase noise region based on the derivative.

A method of minimizing phase noise of a VCO having an active device operating within a phase lock loop (PLL), comprising the steps of:

• sweeping the active device with a bias voltage;
• generating a control voltage within the PLL to steer the VCO in response to the active device being swept;
• and
• determining the slope of the control voltage versus the bias voltage over the swept bias voltage in order to locate a region of minimum phase noise operation for the VCO.

A voltage controlled oscillator, including:

• an active device for receiving an input bias voltage and generating a VCO output frequency;
• a divider for dividing the VCO output frequency into a divided VCO output frequency;
• a phase detector for comparing a reference frequency to the divided VCO output frequency thereby producing an error voltage;
• a loop filter for filtering the error voltage and generating a control voltage, the control voltage for steering the VCO;
• and
• control circuitry for determining the slope of the control voltage versus the input bias voltage over a predetermined bias voltage range, the slope for estimating a minimum phase noise region of operation for the VCO.

A radio, including:

• a phase lock loop (PLL) circuit, having:
• a voltage controlled oscillator (VCO) circuit receiving a bias input;
• a divider coupled to the VCO;
• a phase detector coupled to the divider;
• a loop filter coupled to the phase detector, the loop filter generating a control voltage signal;
• and
• logic circuitry coupled across the control voltage signal and bias voltage input of the VCO, the logic circuitry estimating a minimum phase noise region based on a slope of the changing control voltage over changing bias voltage for a predetermined bias voltage range.