Analog voltage maximum selection and sorting circuits

A circuit comprising:

• a plurality of inputs, each input having an input voltage;
• a plurality of outputs, each output associated with an input and providing an output voltage;
• and
• a summer having a plurality of summer inputs and a summer output;
• and
• a plurality of circuit modules wherein the number of circuit modules equals the number of inputs, each circuit module comprising:
• a plurality of circuit module inputs;
• a first circuit module output having a first circuit module output voltage;
• a second circuit module output providing a second circuit module output voltage being of equal magnitude and opposite sign of the first circuit module output voltage, the second circuit module output being connected to one of the summer inputs;
• and
• wherein one of the circuit module inputs is connected to an input, one of the circuit module inputs is connected to the first circuit module output and one of the circuit module inputs is connected to the summer output.

A circuit comprising:

• a plurality of inputs, each input having an input voltage;
• a plurality of outputs, each output associated with an input and providing an output voltage;
• a plurality of circuit modules comprising:
• a first circuit module input having a first circuit module voltage;
• a second circuit module input having a second circuit module voltage;
• a first circuit module output providing a first circuit module output voltage;
• a second circuit module output having a second circuit output voltage being of equal magnitude and opposite sign of the first circuit module output voltage;
• a logic signal output having a logic signal output voltage;
• wherein the first module output voltage is a sum of the first module input voltage, the second module input voltage and the first module output voltage when the sum is greater than zero volts and a predetermined voltage when the sum is not greater than zero volts;
• and
• wherein the logic signal output voltage is a first voltage when the first module output voltage is greater than zero volts and a second voltage when the first module output voltage is not greater than zero volts;
• a summer for summing the second circuit module output voltages and providing the sum to the second circuit module input of each circuit module;
• and
• a coder responsive to the logic signal output voltage of each circuit module for providing an address associated with the circuit module.

A circuit for identifying a highest voltage of a plurality of voltages comprising:

• a plurality of input terminals, each input having an input voltage;
• a plurality of output terminals, each output terminal associated with an input terminal;
• and
• a highest voltage identifying means disposed between the input terminals and the output terminals for placing a first output voltage on the one of the output terminals corresponding to the input having the highest input voltage, wherein the first output voltage is substantially equal to the highest input voltage, and for placing a second output voltage on the other of the output terminals, wherein the second output voltage is a predetermined voltage.

A circuit for identifying a highest voltage of a plurality of voltages comprising:

• a plurality of input terminals, each input having an input voltage;
• an output terminal;
• a highest voltage identifying means which determines the highest input voltage and provides an output voltage on the output terminal;
• and
• a coder output for providing an address of the input terminal having the highest input voltage.

A circuit comprising:

• a first module input having a first module input voltage;
• a second module input having a second module input voltage;
• a first module output providing a first module output voltage;
• a second module output providing a second module output voltage which is of equal magnitude and opposite sign of the first module output voltage;
• a logic signal output providing a logic signal output voltage;
• wherein the first module output voltage is a sum of the first module input voltage, the second module input voltage and the first module output voltage when the sum is greater than zero volts and a predetermined voltage when the sum is not greater than zero volts;
• and
• wherein the logic signal output voltage is a first voltage when the first module output voltage is greater than and the predetermined voltage and a second voltage when the first module output voltage is not greater than the predetermined voltage.

A circuit comprising:

• N Q-element inputs having voltages W1, W2, . . . , WN applied thereto, where N is any positive integer greater than 1;
• a first Q-element output providing a voltage Vx such that ⁢ V x = { σ , σ > 0 0 , σ ≤ 0
• where σ = ∑ i = 1 N ⁢ W i
• and
• a second Q-element output providing a voltage Vy such that
• Vy=−Vx.

A method of sorting a plurality of input signals comprising the steps of:

• providing a circuit having a plurality of inputs, each input having an input signal with an input signal strength;
• providing a plurality of X outputs, each X output associated with a respective one of the inputs and having an X output signal with an X output signal strength;
• and
• sorting the input signals by input signal strength by:
• a. placing a signal on the X output associated with the input having a highest input signal strength, wherein the X output signal strength is substantially equal to the input signal strength;
• b. placing a predetermined signal on the remaining X outputs;
• c. nullifying the input having the highest signal strength;
• and
• d. repeating steps a through c until the relative input signal strength of all of the inputs has been determined.

A method of sorting a plurality of input signals comprising the steps of:

• providing a circuit having a plurality of inputs, each input having an input signal with an input signal strength;
• providing a multi-bit digital output;
• and
• sorting the input signals by input signal strength by:
• a. placing an address associated with the input having a highest input signal strength on the multi-bit digital output;
• b. nullifying the input having the highest signal strength;
• and
• c. repeating steps a and b until the relative input signal strength of all of the inputs has been determined.

A method of sorting a plurality of input signals comprising the steps of:

• providing a circuit having a plurality of inputs, each input having an input signal with an input signal strength;
• providing a single T output having a T output signal with a T output signal strength;
• sorting the input signals by input signal strength by:
• a. placing an address associated with the input having a highest input signal strength substantially equal to a highest input signal strength;
• b. determining a location of the input having the highest input signal strength;
• c. nullifying the input having the highest signal strength;
• and
• d. repeating steps a and c until the relative input signal strength of all of the inputs has been determined.