Semiconductor programmable test arrangement such as an antifuse to ID circuit having common access switches and/or common programming switches

A semiconductor integrated circuit comprising:

• a plurality of programmable elements, each having a first terminal connected to a power supply potential, said power supply potential being switchable between a first power supply potential and a second power supply potential and a second terminal;
• a plurality of first semiconductor switching elements, each having a first terminal respectively connected to said second terminal of a corresponding one of said plurality of programmable elements, and a second terminal;
• and
• a plurality of second semiconductor switching elements, each having a first terminal connected in common to selected ones of said second terminals of said plurality of first semiconductor switching elements, and a second terminal connected to said second power supply potential,
• wherein said pluralities of programmable elements and first semiconductor switching elements are arranged in respective pluralities of subgroups such that each subgroup of first semiconductor switching elements is associated with a corresponding subgroup of programmable elements, and each first terminal of said plurality of second semiconductor switching elements is connected in common to said second terminals of a corresponding subgroup of said first semiconductor switching elements.

A semiconductor integrated circuit comprising:

• a plurality of groups of programmable elements, each said programmable element having a first terminal for connection to a power supply potential, said power supply potential being switchable between a first power supply potential and a second power supply potential, and a second terminal;
• a plurality of groups of first semiconductor switching elements, each of said plurality of groups of first semiconductor switching elements being associated with a respective one of aid plurality of groups of programmable elements, each of said first semiconductor switching elements within a respective group having a first terminal connected to said second terminal of a corresponding programmable element, a second terminal, and a control terminal for receiving one of a plurality of first control signals;
• and
• a group of second semiconductor switching elements respectively corresponding to the plurality of groups of first semiconductor switching elements, each having a first terminal connected to said second terminals of a corresponding one of said first semiconductor switching elements within each of said plurality of groups of said first semiconductor switching elements, a second terminal for connection to said second power supply potential, and a control terminal for receiving a respective one of a plurality of second control signals.

A semiconductor integrated circuit comprising:

• a plurality of programmable elements, each said programmable element having a first terminal coupled to a power supply potential, said power supply potential being switchable between a first power supply potential and a second power supply potential, and a second terminal;
• a plurality of groups of first semiconductor switching elements, each of said plurality of groups of first semiconductor switching elements being associated with a respective one of said plurality of programmable elements, each of said first semiconductor switching elements within a respective group having a first terminal connected to said second terminal of a corresponding programmable element, a second terminal, and a control terminal for receiving a respective one of a plurality of first control signals;
• and
• a group of second semiconductor switching elements respectively corresponding to the plurality of groups of first semiconductor switching elements, each having a first terminal connected in common to said second terminals of a corresponding group of said first semiconductor switching elements, a second terminal for connection to said second power supply potential, and a control terminal for receiving a respective one of a plurality of second control signals.

A method of programming a plurality of programmable elements grouped in a plurality of subgroups, comprising the steps of:

• applying each one of a plurality of first signals to each subgroup, respectively;
• supplying a second signal at like respective terminals in each subgroup, at each of which terminals is connected a first terminal of one of said programmable elements;
• and
• applying a programming voltage of a first magnitude and a first polarity to a second terminal of said one of said programmable elements,
• wherein one of the applying each one of a plurality of first signals and supplying steps is performed by a single switching element while the other of said applying each one of a plurality of first signals and supplying steps is performed by multiple switching elements, each of which forms a respective series circuit with the single switching element.

A method of programming a plurality of programmable elements grouped in a plurality of subgroups, comprising the steps of:

• applying each of a plurality of programming signals to a respective one of said subgroups;
• applying an address signal via a single switching element at like respective positions in each of said subgroups, at each of which positions is connected a first terminal of one of said programmable elements;
• and
• applying a programming voltage of a first magnitude and a first polarity to a second terminal of said one of said programmable elements.