Semiconductor with plurality of connecting parts arranged on lower surface of a substrate
AssigneeOki Electric Industry Co., Ltd.
InventorYoshinori Shizuno
Life of this patent
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Abstract
Electrical devices such as a plurality of semiconductor devices are mounted so as to be linearly symmetrical with respect to each other on an external substrate, with wiring from a semiconductor chip to first and second pads arranged in such a manner that signals outputted from the semiconductor chip arranged on an upper surface of a substrate reach the first and second pads arranged near two opposing sides of the lower surface of the substrate at substantially the same time.
Claims23
A semiconductor device equipped with a semiconductor chip having a plurality of electrodes for outputting electrical signals to outside, and a substrate having an upper surface, and having a lower surface on an opposite side to the upper surface, with the semiconductor chip being mounted on the upper surface, a plurality of connectors, including a first connector and a second connector, for electrically connecting with an external substrate, being arranged in an array on the lower surface, and the substrate being formed with wiring for electrically connecting the plurality of electrodes of the semiconductor chip and the plurality of connectors, wherein the wiring is arranged in such a manner that a signal outputted from one electrode of the plurality of electrodes is transmitted to both the first connector and the second connector at substantially the same time.
An electrical device unit, comprising:
- an electrical device including electrical elements having electrodes for outputting electrical signals,
- a package substrate, the electrical device being disposed with the electrical elements mounted on an upper surface of the package substrate,
- a first pad and a second pad for electrically connecting with an external substrate, provided on two opposing sides of a lower surface thereof, and
- wiring electrically connecting the electrodes and the first and second pads, wherein the wiring is laid out in such a manner that a signal outputted from one electrode of the electrodes reaches both the first pad and the second pad at substantially the same time.
A semiconductor device, including a semiconductor element having electrodes for outputting signals,
- a package substrate with the semiconductor element mounted on an upper surface thereof,
- first and second pads, arranged near two different sides of a lower surface of the package substrate, for connecting electrically with an external substrate, and
- wiring for electrically connecting the electrodes and the first and second pads, wherein electrical resistance of wiring from one of the electrodes to the first pad and electrical resistance of wiring from the electrodes to the second pad are substantially the same and the wiring being arranged such that a signal outputted from the one electrode reaches both the first pad and the second pad at the same time.
A circuit substrate with an upper surface capable of mounting thereto an electrical element having electrodes including one electrode for outputting a signal and a lower surface arranged with first and second pads in the vicinity of two different sides thereof for electrically connecting with an external substrate, and being formed with connecting wiring for electrically connecting the electrodes and the first and second pads, wherein electrical resistance of wiring from the one electrode to the first pad and electrical resistance of wiring from the one electrode to the second pad are substantially the same, and wherein the connecting wiring is arranged such that a signal outputted from the one electrode reaches both the first pad and the second pad at the same time.
A semiconductor unit including first and second semiconductor devices positioned in a linearly symmetrical manner, each of the first and second semiconductor devices including
- a semiconductor chip having a plurality of electrodes for outputting electrical signals to outside, and
- a device substrate having an upper surface, and having a lower surface on an opposite side to said upper surface, with the semiconductor chip being mounted on the upper surface, and with a plurality of connectors in an array, including a first connector and a second connector, on the lower surface for electrically connecting with an external substrate;
- the device substrate being formed with wiring for electrically connecting the plurality of electrodes of the semiconductor chip and the plurality of connectors,
- wherein the wiring for each of the first and second semiconductor devices is arranged in such a manner that
- electrical characteristics between the pluralities connectors and electrodes of the first semiconductor device are substantially the same as the electrical characteristics between the pluralities of connectors and electrodes of the second semiconductor device,
- the plurality of connectors of the first semiconductor device and the plurality of connectors of the second semiconductor device are positioned in a mutually linearly symmetrical manner and
- in each of the first and second semiconductor devices, a signal outputted from one electrode of the plurality of electrodes thereof reaches both the first connector thereof and the second connector thereof at the same time.
Dependencies are inferred from the claim text.