High performance transistor fabricated on a dielectric film and method of making same

A transistor structure, comprising:

• a layer of dielectric material;
• a plurality of source/drain regions formed from a first layer of polysilicon and positioned above said layer of dielectric material;
• a second layer of polysilicon positioned between said source/drain regions and above said layer of dielectric material;
• a gate dielectric positioned above said second layer of polysilicon;
• a gate conductor positioned above said gate dielectric;
• and
• a plurality of sidewall spacers positioned above said second layer of polysilicon, each of said sidewall spacers being positioned between one of said source/drain regions and said gate conductor.

An integrated circuit device comprised of multiple layers of transistors, comprising:

• a first plurality of transistors formed above a surface of a semiconducting substrate, each of said transistors having a gate conductor;
• a layer of dielectric material positioned above said substrate, said layer of dielectric material having a surface that extends above the gate conductors of said first plurality of transistors;
• a second plurality of transistors formed above the surface of said layer of dielectric material, each of said second plurality of transistors comprising:
• a plurality of source/drain regions formed from a first layer of polysilicon and positioned above said layer of dielectric material;
• a second layer of polysilicon positioned between said source/drain regions and above the surface of said layer of dielectric material;
• a gate dielectric positioned above said second layer of polysilicon;
• and
• a gate conductor positioned above said gate dielectric.

An integrated circuit device comprised of multiple layers of transistors, comprising:

• a first plurality of transistors formed above a surface of a semiconducting substrate, each of said transistors having a gate conductor;
• a layer of dielectric material positioned above said first plurality of transistors, said layer of dielectric material having a surface;
• a second plurality of transistors formed above the surface of said layer of dielectric material, each of said second plurality of transistors comprising:
• a plurality of source/drain regions formed from a first layer of polysilicon and positioned above said layer of dielectric material;
• a second layer of polysilicon positioned between said source/drain regions and above the surface of said layer of dielectric material;
• a gate dielectric positioned above said second layer of polysilicon;
• and
• a gate conductor positioned above said gate dielectric.