Non-volatile semiconductor memory device having multiple different sized floating gates
AssigneeNEC Corporation
InventorMasaru Tsukiji
Life of this patent
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Abstract
The object of the present invention is to provide a non-volatile semiconductor memory device which is capable of increasing a integration density of a memory cell by increasing the number of states to be expressed with one memory cell. A non-volatile semiconductor memory device of the present invention has a structure in which two floating gates (3, 4) under one control gate (5) having a minimum dimension are provided, each of two floating gates is able to express two values in accordance with existences of stored charges whereby one memory cell is able to express four values and the widths of the two floating gates are different.
Claims10
A non-volatile semiconductor memory device having a memory cell and comprising:
- a semiconductor substrate having a major surface of P type;
- a drain region of N type and a source region of N type, said drain region and said source region each formed in said major surface of said semiconductor substrate;
- a channel region formed between said drain region and said source region;
- a first insulating film on an upper surface of said channel region, and a second insulating film;
- and
- at least a first and second floating gate having lower surfaces which contact said first insulating film and upper surfaces which contact said second insulating film;
- wherein a width of said first floating gate is different from a width of said second floating gate and each of at least a first and a second floating gate is capable of storing one of two data states in accordance with charge stored on each of said first and second floating gates;
- and
- wherein said first and second floating gates are disposed side by side in the direction of the channel width.
Dependencies are inferred from the claim text.