FPGA one turn routing structure using minimum diffusion area
AssigneeXilinx, Inc.
InventorSteven P. Young
Life of this patent
Estimating the term…
Abstract
A structure and method are provided for designing the architecture of a routing structure in a programmable logic device that maximizes the number of possible paths for an available diffusion area. The method comprises steps for selecting wire directions for a plurality of wires interconnectible at a unitary diffusion area of an integrated circuit device or portion thereof. The steps of the inventive method result in a highly alternated array of wire directions, including serial sets of four wires composed of four wires extending in four compass directions. In one embodiment of the inventive method, the first two wire directions are repeated from set to set, while the second two wire directions are alternated. A second embodiment with a repeating pattern of 24 wire directions is also disclosed.
Claims4
An integrated circuit device comprising:
- a routing structure;
- and
- a plurality of wires extending from said routing structure in each of a plurality of compass directions, each of said plurality of wires having an assigned direction based on the compass direction in which it extends from said routing structure,
- said routing structure comprising an elongated diffusion area having a plurality of serially arrayed diffusion regions, one of said diffusion regions being connected to each respective wire of said plurality of wires, each such region being selectively connectable to at least one adjacent diffusion region by a voltage-controlled transistor gate for transmitting a signal on one said wire having a first direction to another said wire having a second direction;
- and
- the respective directions of said wires conforming to a serial pattern wherein each such wire has a direction which is perpendicular to the direction of one wire connected to one adjacent diffusion region and opposite to the direction of another wire connected to another adjacent diffusion region.
An integrated circuit device having a plurality of programmable wire interconnections among a plurality of wires forming a plurality of routing structures, each wire having a direction based upon its input or output location within one of said routing structures, comprising:
- an elongated diffusion area having a plurality of serially arrayed diffusion regions, one of said diffusion regions being connected to each respective wire of said plurality of wires, each such region being selectively connectable to at least one adjacent diffusion region by a voltage-controlled transistor gate for transmitting a signal on one said wire having a first direction to another said wire having a second direction;
- the respective directions of said wires conforming to a serial pattern wherein each such wire has a direction which is perpendicular to the direction of one wire connected to one adjacent diffusion region and opposite to the direction of another wire connected to another adjacent diffusion region, wherein said pattern comprises sets of four adjacent wires and wherein the sequence of wire directions within each such set is different from the sequence of wire directions in immediately adjacent sets.
A programmable routing structure, comprising:
- an elongated diffusion area;
- a plurality of programmable gates dividing said elongated diffusion area into a plurality of serially arrayed diffusion regions;
- and
- for each of said diffusion regions a wire connected to said region and extending in one of four compass directions, adjacent ones of said diffusion regions being connected to wires extending in different directions;
- wherein said diffusion regions are grouped into sets of four adjacent regions and the four regions of one such set are connected to wires extending in four different directions.
A programmable routing structure, comprising:
- an elongated diffusion area;
- a plurality of programmable transistor gates dividing said elongated diffusion area into a plurality of serially arrayed diffusion regions such that adjacent ones of said diffusion regions are programmably connected by said transistor gates;
- and
- for each of said diffusion regions a wire connected to said diffusion region and extending in one of four compass directions, adjacent ones of said diffusion regions being connected to wires extending in different directions;
- wherein each diffusion region:
- is connected to a wire extending in a first direction;
- is programmably connected to one adjacent diffusion region connected to a wire extending in the opposite direction to said first direction;
- and
- is programmably connected to another adjacent diffusion region connected to a wire extending perpendicular to said first direction.
Dependencies are inferred from the claim text.