Low temperature formation of low resistivity titanium silicide

A method of forming a titanium silicide layer in a semiconductor device, comprising:

• depositing a 10 to 200 nm titanium alloy layer over a semiconductor device, wherein said titanium alloy comprises from 1 to 15 atomic percent refractory metal and said semiconductor device incorporates a plurality of electronic components having exposed silicon surfaces;
• heating said titanium alloy layer to a temperature sufficient to substantially form C54 phase titanium silicide in the titanium alloy layer overlying said silicon surfaces, said temperature being less than about 700° C.;
• and
• etching unreacted portions of said titanium alloy layer.

A method of forming a titanium silicide layer in a semiconductor device, comprising:

• depositing a 10 to 200 nm titanium alloy layer over a semiconductor device, wherein said titanium alloy comprises from 1 to 15 atomic percent refractory metal and said semiconductor device incorporates a plurality of electronic components having exposed silicon surfaces;
• heating said titanium alloy layer sufficient to form titanium silicide m the titanium alloy overlying said silicon surfaces;
• etching unreacted portions of said titanium alloy;
• and
• heating said titanium silicide to a temperature sufficient to substantially form C54 phase titanium silicide, said temperature being less than about 700° C.