Method of forming self-aligned unlanded via holes
AssigneeUnited Microelectronics Corp.
InventorsHua-Shu Wu, Chun-Hung Peng, Hung-Chan Lin
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Abstract
The present invention discloses a method of forming self-aligned unlanded via holes. First, a substrate having a patterned conductive layer on its surface is provided, and then a first dielectric layer is deposited on the substrate by using high density plasma chemical vapor deposition (HDP CVD). Next, a silicon nitride layer and a second dielectric layer are sequentially deposited on the first dielectric layer. Thereafter, the second dielectric layer, the silicon nitride layer and the first dielectric layer are etched back to remove a portion of the silicon nitride layer overlying the patterned conductive layer. Finally, a third dielectric layer is deposited, and then via holes are defined in the third dielectric layer.
Claims17
A method of forming self-aligned unlanded via holes, comprising:
- (a) providing a substrate having a patterned conductive layer on its surface;
- (b) depositing a first dielectric layer on said substrate by using high density plasma chemical vapor deposition (HDP CVD);
- (c) depositing a silicon nitride etch stop layer on said first dielectric layer;
- (d) depositing a second dielectric layer on said silicon nitride layer;
- (e) etching back said second dielectric layer, said silicon nitride layer and said first dielectric layer to remove a portion of said silicon nitride layer overlying said patterned conductive layer;
- (f) depositing a third dielectric layer on said substrate;
- and
- (g) defining via holes in said third dielectric layer.
A method of forming self-aligned unlanded via holes, comprising:
- (a) providing a substrate having a patterned conductive layer on its surface;
- (b) depositing a buffer layer over said substrate and said patterned conductive layer;
- (c) depositing a first dielectric layer on said buffer layer by using high density plasma chemical vapor deposition (HDP CVD);
- (d) depositing a silicon nitride etch stop layer on said first dielectric layer;
- (e) depositing a second dielectric layer on said silicon nitride layer;
- (f) etching back said second dielectric layer, said silicon nitride layer and said first dielectric layer to remove a portion of said silicon nitride layer overlying said buffer layer;
- (g) depositing a third dielectric layer on said substrate;
- and
- (h) defining via holes in said third dielectric layer.
A method of forming self-aligned unlanded via holes, comprising:
- (a) providing a substrate having a patterned conductive layer on its surface;
- (b) depositing a first dielectric layer on said substrate by using high density plasma chemical vapor deposition (HDP CVD);
- (c) depositing a buffer layer on said first dielectric layer;
- (d) depositing a silicon nitride etch stop layer on said buffer layer;
- (e) depositing a second dielectric layer on said silicon nitride layer;
- (f) etching back portions of said second dielectric layer, portions of said silicon nitride layer and portions of said buffer layer;
- (g) depositing a third dielectric layer on said substrate;
- and
- (h) defining via holes in said third dielectric layer.
Dependencies are inferred from the claim text.