Method of optimizing device performance via use of copper damascene structures, and HSQ/FSG, hybrid low dielectric constant materials

A method of forming a conductive damascene metal structure, in low dielectric constant materials, on a semiconductor substrate, comprising the steps of;

• providing a lower level, metal interconnect structure, either embedded in, or residing on, the top surface of an underlying, first insulator layer;
• forming a first level, composite insulator layer, on said lower level, metal interconnect structure, and on the top surface of said underlying first insulator layer, with said lower level, composite insulator layer, comprised of an underlying, first type, low dielectric constant layer, and of an overlying, second type, low dielectric constant layer;
• depositing a second insulator on the top surface of said lower level, composite insulator layer;
• forming a second level, composite insulator layer, on the top surface of said second insulator layer, with said second level, composite insulator layer, comprised of an underlying, said first type, low dielectric layer, and of an overlying, said second type, low dielectric constant layer;
• using a first photoresist shape as a mask, to selectively form a wide diameter, first opening, in said second level, composite insulator layer, exposing a portion of the top surface of said second insulator layer;
• using a second photoresist shape as a mask, to open a narrow diameter, second opening, in said second insulator layer, and in said first level, composite insulator layer, exposing a portion of said lower level, metal interconnect structure;
• and
• forming said conductive damascene metal structure, in a dual damascene opening, comprised of said wide diameter, first opening, and comprised of said narrow diameter, second opening, with said damascene metal structure embedded in said low dielectric materials, comprised of said first level, composite insulator layer, and comprised of said second level, composite insulator layer.