CVD-based process for manufacturing stable low-resistivity poly-metal gate electrodes
AssigneeTexas Instruments Incorporated
InventorsJiong Ping Lu, Ming Hwang, Dirk N. Anderson, Jorge A. Kittl, Hun-Lian Tsai
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Abstract
A process for forming a W-poly gate stack (110) comprising the steps of: (1) deposition of doped polysilicon (112) on a thin dielectric layer (108) covered substrate (102), (2) deposition of WNx by a CVD-based process, (3) thermal treatment to covert WNx into thermally stable barrier, WSiNx, (114) and to remove excess nitrogen and (4) deposition of W layer (116). The stack layers are then etched to form the gate electrode (110).
Claims24
A method of fabricating an integrated circuit comprising the steps of:
- forming a dielectric layer over a semiconductor body;
- forming a silicon layer over the dielectric layer;
- depositing a metal-nitride layer over the silicon layer using a chemical-vapor-deposition (CVD) process;
- thermally treating said metal nitride layer to cause said metal nitride layer to react with said silicon layer to form a thermally stable barrier layer;
- forming a metal layer over said barrier layer;
- wherein said steps of depositing the metal nitride layer and depositing the metal layer are performed in the same chamber.
A method of fabricating a gate electrode comprising the steps of:
- forming a gate dielectric over a substrate;
- forming a polysilicon layer over the gate dielectric;
- depositing a WNx layer on the polysilicon layer using a chemical-vapor deposition (CVD) process;
- thermally treating said WNx layer to cause said WNx layer to react with said polysilicon layer to form a thermally stable barrier layer;
- and
- then, forming a W layer over said barrier layer.
A method of fabricating a gate electrode comprising the steps of:
- forming a gate dielectric over a substrate;
- forming a polysilicon layer over the gate dielectric;
- performing a nitridation step;
- after said nitridation step, depositing a WNx layer over the polysilicon layer using a chemical-vapor deposition (CVD) process;
- thermally treating said WNx layer to cause said metal nitride layer to react with said polysilicon layer to form a thermally stable barrier layer;
- and
- then, forming a W layer over said barrier layer.
A method of fabricating an integrated circuit comprising the steps of:
- forming a gate dielectric over a semiconductor body;
- forming a polysilicon layer over the gate dielectric;
- depositing a metal-nitride layer on the polysilicon layer using a chemical-vapor-deposition (CVD) process;
- thermally treating said metal-nitride layer to cause said metal-nitride layer to react with said polysilicon layer to form a thermally stable barrier layer;
- and
- then, forming a metal layer over said barrier layer, wherein said metal layer and said metal-nitride layer both comprise the same metal.
Dependencies are inferred from the claim text.