Method of fabricating a DRAM capacitor

A method of fabricating a DRAM capacitor wherein a substrate has a first dielectric layer formed on the substrate, comprising:

• forming a first conductive layer and a first amorphous silicon layer on the dielectric layer;
• forming a region of the capacitor by patterning the first amorphous layer and the first conductive layer to expose a portion of the first dielectric layer;
• forming an opening having a wider upper portion and a narrower lower portion within the first conductive layer to expose the first dielectric layer;
• forming a node contact window to expose the substrate by patterning the first dielectric layer through the opening;
• forming a second amorphous silicon layer on the capacitor region such that a portion of the second amorphous silicon layer fills the node contact window and is electrically coupled to the substrate, wherein the first conductive layer and the second amorphous silicon layer serve as a lower electrode of the capacitor;
• and
• forming a second dielectric layer and a second conductive layer on the lower electrode wherein the second conductive layer serves as an upper electrode of the capacitor.

A method of fabricating a DRAM capacitor wherein a substrate has a first dielectric layer formed on the substrate, comprising:

• forming a first conductive layer on the first dielectric layer;
• forming a region of the capacitor by patterning the first conductive layer to expose a portion of the first dielectric layer;
• forming an opening having a wider upper portion and a narrower lower portion within the first conductive layer to expose the first dielectric layer;
• forming a node contact window in the first dielectric layer to expose the substrate by patterning the first dielectric layer through the opening;
• forming an amorphous silicon layer on the sidewall of the conductive layer and filling the node contact window with the amorphous silicon layer to electrically couple the amorphous silicon layer to the substrate, wherein the first conductive layer and the amorphous silicon layer serve as a lower electrode of the capacitor;
• and
• forming a second dielectric layer and a second conductive layer on the lower electrode wherein the second conductive layer serves as an upper electrode of the capacitor.

A method of fabricating a node contact window, comprising:

• providing a substrate having a dielectric layer thereon;
• forming a conductive layer on the dielectric layer;
• forming an amorphous silicon layer on the conductive layer;
• forming a region of a capacitor by patterning the conductive layer and the amorphous silicon layer;
• forming an opening having an wider upper profile within the conductive layer to expose the dielectric layer;
• and
• forming a node contact window within the dielectric layer by etching through the dielectric layer to expose the substrate.