Method and apparatus for determining wire routing
AssigneeLSI Logic Corporation
InventorsAlexander E. Andreev, Ivan Pavisic, Ranko Scepanovic
Life of this patent
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AssigneeLSI Logic Corporation
InventorsAlexander E. Andreev, Ivan Pavisic, Ranko Scepanovic
Estimating the term…
Integrated circuit chips (IC's) require proper placement of many cells (groups of circuit components) and complex routing of wires to connect the pins of the cells. Because of the large number of the cells and the complex connections required, it is essential that wire routine be done correctly to avoid any congestion of wires. Congestion of wires can be determined by actually routing of the wires to connect the cells; however, the routing process is computationally expensive. For determination of congestion, the only required information are the location of the connections, or edges, to connect the pins of the IC. The present invention discloses a method to quickly provide a good estimate of the location of the edges, or connections for an IC. The present invention provides for a method to determine all the edges and superedges (bounding boxes, or areas where an edge will take space) of an IC without requiring to determine the actual routing of the wires of an IC.
A method of determining the edges for routing of wires for a net having pins, said method comprising the steps of:
An integrated circuit chip (IC) having pins optimally routed, said optimal routing method comprising the steps of:
An apparatus for determining the edges for routing a set of pins, said apparatus comprising:
A machine-readable storage medium containing instructions for a processor, said instructions comprising the steps for the processor to:
Dependencies are inferred from the claim text.