Software debug port for a microprocessor

A software debug platform for communicating with a non-trace capture host system capable of executing debug software that controls the extraction and analysis of debug information, the software debug platform comprising:

• a target system having a processor-based device, the processor-based device comprising:
• a processor core;
• a serial port formed of a plurality of pins configured to receive standardized serial port signals as well as signals from the non-trace capture host system;
• control circuitry coupled to the serial port for decoding and differentiating between standardized serial port signals and signals used by the non-trace capture host system;
• a plurality of debug registers coupled to the control circuitry and the processor core for receiving and providing debug data and control signals;
• and
• at least one additional pin of the serial port configured to facilitate communication between non-trace capture host system and the processor core,
• wherein the processor core is adapted to perform various software debug operations in response to signals from the non-trace capture host system, the at least one additional pin providing an indication of the status of select software debug operations;
• and
• a debug connector for communicatively coupling the serial port and the at least one additional pin of the target system with the non-trace capture host system.

A processor-based device provided with pins to permit connection to external electrical devices, the processor-based device comprising:

• a processor core;
• a serial port formed of a plurality of pins configured to receive standardized serial port signals as well as signals from external non-trace capture software debug equipment;
• at least one additional pin configured to facilitate communication between external non-trace capture software debug equipment and the processor core;
• control means coupled to the serial port for decoding and differentiating between standardized serial port signals and signals used by external non-trace capture software debug equipment;
• and
• communication means coupled to the control means and the processor core for receiving and providing debug data and control signals,
• wherein the processor core is adapted to perform various software debug operations in response to signals from external non-trace capture software debug equipment, the at least one additional pin providing an indication of the status of software debug operations.

A method of providing software debug information from a processor-based device to external non-trace capture debug equipment, comprising:

• providing a serial port in the processor-based device, the serial debug port formed of a plurality of pins configured to receive standardized serial port signals in addition to signals from external non-trace capture debug equipment, the serial port further being coupled to control circuitry for decoding and differentiating between standardized serial port signals and signals used by the external debug equipment;
• providing at least one additional pin in the processor-based device, the at least one additional pin configured to facilitate communication between external non-trace capture debug equipment and the processor-based device;
• selectively performing software debug operations in the processor-based device in response to signals from the external non-trace capture debug equipment communicated via the serial port;
• and
• communicating the status of the debug operations from the processor-based device to the external non-trace capture debug equipment via the at least one additional pin.